twitter: linux.kernel - 25 new messages in 18 topics

linux.kernel
http://groups.google.com/group/linux.kernel?hl=en

Today's topics:

* lxfb_core: support 800x480 panel - 1 messages, 1 author
http://groups.google.com/group/linux.kernel/t/dee9c668ea1f68af?hl=en
* aio: compat_ioctl issue? - 4 messages, 2 authors
http://groups.google.com/group/linux.kernel/t/b4bbeb78a34e8be1?hl=en
* [PATCH 1/1] perf: add support for arch-dependent symbolic event names to "
perf stat" - 1 messages, 1 author
http://groups.google.com/group/linux.kernel/t/d9c6c63579142582?hl=en
* perf fixes - 1 messages, 1 author
http://groups.google.com/group/linux.kernel/t/a0948fa34b446e30?hl=en
* cpuset: current_cpuset_is_being_rebound() need rcu lock - 1 messages, 1
author
http://groups.google.com/group/linux.kernel/t/d8e6cc320897dd43?hl=en
* Linux 2.6.24 Through Linux 2.6.33 Benchmarks - 1 messages, 1 author
http://groups.google.com/group/linux.kernel/t/13fede5ff0c6a45e?hl=en
* Document Linux's circular buffering capabilities - 1 messages, 1 author
http://groups.google.com/group/linux.kernel/t/1e678f41e15225ea?hl=en
* Document Linux's circular buffering capabilities [ver #2] - 2 messages, 1
author
http://groups.google.com/group/linux.kernel/t/1b44348100d90ac1?hl=en
* Document Linux's circular buffering capabilities [ver #2a] - 2 messages, 2
authors
http://groups.google.com/group/linux.kernel/t/9dcd54556ccbcb82?hl=en
* io-controller: Add a new interface "weight_device" for IO-Controller - 1
messages, 1 author
http://groups.google.com/group/linux.kernel/t/4499978e89af9b0d?hl=en
* sound/soc: use .dev.of_node instead of .node in struct of_device - 2
messages, 2 authors
http://groups.google.com/group/linux.kernel/t/2014a315f2e95e8a?hl=en
* patch for file ni_daq_700.c - 1 messages, 1 author
http://groups.google.com/group/linux.kernel/t/2a0a99bfefaedcf6?hl=en
* BNX2: Kernel crashes with 2.6.31 and 2.6.31.9 - 2 messages, 2 authors
http://groups.google.com/group/linux.kernel/t/c0235d6a433f1e2b?hl=en
* driver core: Early dev_name() support. - 1 messages, 1 author
http://groups.google.com/group/linux.kernel/t/6d8698dd4209e0a2?hl=en
* Staging: cx25821 fixed C99 comments, white spaces and unnecessary braces
This patch fixes some C99 style comments, trailing white spaces and some
unnecessary 'if' braces found by checkpatch.pl Signed-off-by: Wouter Van Rooy <
wouter.vanrooy@gmail.com> - 1 messages, 1 author
http://groups.google.com/group/linux.kernel/t/2ef5d5f5fe526d4b?hl=en
* PCI: Cannot allocate resource regions of bridge and device in ThinkPad dock -
1 messages, 1 author
http://groups.google.com/group/linux.kernel/t/e9310ee5ba556288?hl=en
* Anyone using ray_cs wireless driver? - 1 messages, 1 author
http://groups.google.com/group/linux.kernel/t/4cd9b76eb14de927?hl=en
* MIPS: Fix compile error implicit declaration of function cpu_local_wrap - 1
messages, 1 author
http://groups.google.com/group/linux.kernel/t/c169ec2137a3b90b?hl=en

==============================================================================
TOPIC: lxfb_core: support 800x480 panel
http://groups.google.com/group/linux.kernel/t/dee9c668ea1f68af?hl=en
==============================================================================

== 1 of 1 ==
Date: Thurs, Mar 11 2010 11:10 am
From: pavel@ucw.cz

I need something like this to support full resolution of internal LCD
panel on Kohjinsha subnotebook.

(Note: I basically made up the numbers, if someone knows how to
generate them properly, let me know. It somehow works even on external
display, but last few columns are missing.)

Signed-off-by: Pavel Machek <pavel@ucw.cz>

index 889cbe3..2c04a01 100644
--- a/drivers/video/geode/lxfb_core.c
+++ b/drivers/video/geode/lxfb_core.c
@@ -37,6 +37,9 @@ static int vt_switch;
*/

static struct fb_videomode geode_modedb[] __initdata = {
+ /* 800x480-?? */
+ { NULL, 60, 800, 480, 25131, 72, 32, 29, 1, 136, 6,
+ 0, FB_VMODE_NONINTERLACED, 0 },
/* 640x480-60 */
{ NULL, 60, 640, 480, 39682, 48, 8, 25, 2, 88, 2,
FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
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==============================================================================
TOPIC: aio: compat_ioctl issue?
http://groups.google.com/group/linux.kernel/t/b4bbeb78a34e8be1?hl=en
==============================================================================

== 1 of 4 ==
Date: Thurs, Mar 11 2010 11:20 am
From: Jeff Moyer

Michael Tokarev <mjt@tls.msk.ru> writes:

> Jeff Moyer wrote:
> []
>> Yeah, whoops. I built the libaio test harness using -m32 and this patch
>> works for me. Would you mind giving it a try?
>
> It appears to work here so far. I did not run massive i/o test suite
> but it now passes basic multiple kernel unpacking in parallel tests
> (before it didnt' even recognize the partition table).
>
> So the patch - at least basically - works.
>
> Except that we now have code duplication in kernel. Look at
> fs/compat.c:compat_do_readv_writev() - it does the same as
> compat_rw_copy_check_uvector() plus a bit more. I guess it
> is a good idea to use compat_rw_copy_check_uvector() in
> compat_do_readv_writev() to build the compat vectors...

I'm well aware of the code duplication, thanks. You can even find
another copy in net/compat.c. I'll see what I can do about it.

Cheers,
Jeff
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== 2 of 4 ==
Date: Thurs, Mar 11 2010 11:20 am
From: Michael Tokarev

Jeff Moyer wrote:
[]
> Yeah, whoops. I built the libaio test harness using -m32 and this patch
> works for me. Would you mind giving it a try?

It appears to work here so far. I did not run massive i/o test suite
but it now passes basic multiple kernel unpacking in parallel tests
(before it didnt' even recognize the partition table).

So the patch - at least basically - works.

Except that we now have code duplication in kernel. Look at
fs/compat.c:compat_do_readv_writev() - it does the same as
compat_rw_copy_check_uvector() plus a bit more. I guess it
is a good idea to use compat_rw_copy_check_uvector() in
compat_do_readv_writev() to build the compat vectors...

Thank you for the patch and the fix!

/mjt
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== 3 of 4 ==
Date: Thurs, Mar 11 2010 11:50 am
From: Michael Tokarev

Michael Tokarev ?????:
> Jeff Moyer wrote:
> []
>> Yeah, whoops. I built the libaio test harness using -m32 and this patch
>> works for me. Would you mind giving it a try?
>
> It appears to work here so far. I did not run massive i/o test suite
> but it now passes basic multiple kernel unpacking in parallel tests
> (before it didnt' even recognize the partition table).
>
> So the patch - at least basically - works.

It looks like the conclusion was preliminary a bit.
I tested the wrong kvm binary which does not have
aio support...

And when running real thing it crashes. I tested it
on 2.6.32 (trivial corrections to the patch required).

BUG: unable to handle kernel NULL pointer dereference at 0000000000000008
IP: [<ffffffff810c0e57>] generic_segment_checks+0x17/0xd0
PGD 18afe0067 PUD 18ace1067 PMD 0
Oops: 0000 [#1] SMP
last sysfs file: /sys/devices/virtual/input/mice/uevent
CPU 0
Modules linked in: powernow_k8 rfcomm hidp l2cap bluetooth rfkill autofs4 nfsd exportfs nfs lockd fscache nfs_acl auth_rpcgss sunrpc tun ipv6 bridge stp llc quota_v2 quota_tree ext4 jbd2 crc16 md_mod asus_atk0110 thermal r8169 processor thermal_sys floppy mii psmouse edac_core shpchp pci_hotplug i2c_piix4 sg evdev radeon ttm drm_kms_helper drm i2c_algo_bit cfbcopyarea cfbimgblt cfbfillrect fbcon font bitblit softcursor fb saa7134_alsa kvm_amd kvm k8temp hwmon button tuner_simple tuner_types tea5767 tuner saa7134 ir_common v4l2_common videodev v4l1_compat v4l2_compat_ioctl32 videobuf_dma_sg videobuf_core tveeprom i2c_core lp parport_pc parport usb_storage ehci_hcd uhci_hcd snd_mixer_oss snd_hda_codec_realtek snd_hda_intel snd_hda_codec snd_hwdep snd_pcm snd_timer snd soundcore
snd_page_alloc sr_mod cdrom ext3 jbd mbcache pata_atiixp ohci_hcd ahci libata usbhid hid usbcore nls_base sd_mod scsi_mod
Pid: 5135, comm: kvm Not tainted 2.6.32-amd64 #2.6.32.9 System Product Name
RIP: 0010:[<ffffffff810c0e57>] [<ffffffff810c0e57>] generic_segment_checks+0x17/0xd0
RSP: 0000:ffff88018ac6bd80 EFLAGS: 00010202
RAX: ffff88018aebcf00 RBX: ffff88018ac6bdf0 RCX: 0000000000000001
RDX: ffff88018ac6be20 RSI: 0000000000000001 RDI: 0000000000000000
RBP: ffff88018ac6be20 R08: ffffffffffffffea R09: ffff88018aebcf30
R10: 0000000000000000 R11: 0000000000000010 R12: 0000000000000000
R13: 0000000000000000 R14: 0000000000000000 R15: ffff88018ad3d2c0
FS: 0000000000000000(0000) GS:ffff880028200000(0063) knlGS:00000000f6fc9b70
CS: 0010 DS: 002b ES: 002b CR0: 000000008005003b
CR2: 0000000000000008 CR3: 000000018af4e000 CR4: 00000000000006f0
DR0: 0000000000000000 DR1: 0000000000000000 DR2: 0000000000000000
DR3: 0000000000000000 DR6: 00000000ffff0ff0 DR7: 0000000000000400
Process kvm (pid: 5135, threadinfo ffff88018ac6a000, task ffff88018aefb040)
Stack:
ffff88018aebce80 ffff88018aebce80 ffffffff810c36b5 00000010813f8b00
<0> ffff88018aebcf00 0000000000013ad8 ffff88018ac6bfd8 ffff88018aefb040
<0> ffffffff813f7700 ffff88018aefb040 0000000000000000 0000000000000000
Call Trace:
[<ffffffff810c36b5>] ? generic_file_aio_read+0x55/0x620
[<ffffffff810f8696>] ? cache_alloc_refill+0x96/0x5d0
[<ffffffff810c3660>] ? generic_file_aio_read+0x0/0x620
[<ffffffff81139a6c>] ? aio_rw_vect_retry+0x7c/0x210
[<ffffffff8113b252>] ? aio_run_iocb+0x82/0x150
[<ffffffff8113bb8f>] ? do_io_submit+0x2bf/0x640
[<ffffffff81038672>] ? ia32_sysret+0x0/0x5
Code: 82 c0 6c 3f 81 c3 66 66 66 66 66 2e 0f 1f 84 00 00 00 00 00 55 45 31 d2 48 89 d5 53 48 89 f3 48 8b 36 48 85 f6 0f 84 84 00 00 00 <4c> 8b 57 08 4d 85 d2 0f 88 8c 00 00 00 48 8b 07 65 4c 8b 04 25
RIP [<ffffffff810c0e57>] generic_segment_checks+0x17/0xd0
RSP <ffff88018ac6bd80>
CR2: 0000000000000008
---[ end trace 3abdd573ab9bce13 ]---

I'm recompiling 2.6.33 now. There, patch applied cleanly.

== 4 of 4 ==
Date: Thurs, Mar 11 2010 12:00 pm
From: Jeff Moyer

Michael Tokarev <mjt@tls.msk.ru> writes:

> Michael Tokarev ?????:
>> Jeff Moyer wrote:
>> []
>>> Yeah, whoops. I built the libaio test harness using -m32 and this patch
>>> works for me. Would you mind giving it a try?
>>
>> It appears to work here so far. I did not run massive i/o test suite
>> but it now passes basic multiple kernel unpacking in parallel tests
>> (before it didnt' even recognize the partition table).
>>
>> So the patch - at least basically - works.
>
> It looks like the conclusion was preliminary a bit.
> I tested the wrong kvm binary which does not have
> aio support...
>
> And when running real thing it crashes. I tested it
> on 2.6.32 (trivial corrections to the patch required).

Could you just post your version of the patch so I can have a look?

Thanks,
Jeff
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==============================================================================
TOPIC: [PATCH 1/1] perf: add support for arch-dependent symbolic event names
to "perf stat"
http://groups.google.com/group/linux.kernel/t/d9c6c63579142582?hl=en
==============================================================================

== 1 of 1 ==
Date: Thurs, Mar 11 2010 11:20 am
From: Ingo Molnar

* Corey Ashford <cjashfor@linux.vnet.ibm.com> wrote:

> On 3/11/2010 4:46 AM, Ingo Molnar wrote:
> [snip]
> >If you want extensible events you can already do it by providing an ftrace
> >tracepoint event via TRACE_EVENT. They are easy to add and ad-hoc, and are
> >supported throughout by perf.
>
> Is TRACE_EVENT an appropriate way to add hardware-specific counter
> events? I will look into this. Thanks for the pointer.
>
> >
> >That could be librarized further by providing an /eventfs or /proc/events
> >interface to enumerate them.
>
> We can enumerate events this way, but there are other aspects to
> events than just their names (see below).
>
> >
> >Or if you want to extend the perf events namespace ABI you can send patches
> >for that as well. (It's not a big issue if a particular event is currently
> >only supported on Power for example - as long as you make a good effort naming
> >and structuring it in a reasonably generic way.)
>
> I'm not sure how that would work. The issue I am trying to solve
> here is that Power arch chips have a large number of very
> hardware-specific events that are not generalizable. Many of these
> events not only have names, but other user-configurable bits as well
> that select or narrow the scope of which exact events are recorded.
> This issue is dealt with nicely in libpfm4, as it has mechanisms for
> parsing event names and attributes (aka modifiers or unit masks),
> and then produces a usable config field for the perf_events_attr
> struct.
>
> Should I take it from the above that you are completely against the
> idea of using an external library for hardware-specific event and
> attribute naming?

Could you give a few relevant examples of events in question, and the kind of
configurability/attributes they have on Power?

Thanks,

Ingo
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==============================================================================
TOPIC: perf fixes
http://groups.google.com/group/linux.kernel/t/a0948fa34b446e30?hl=en
==============================================================================

== 1 of 1 ==
Date: Thurs, Mar 11 2010 11:20 am
From: Ingo Molnar

Linus,

Please pull the latest perf-fixes-for-linus git tree from:

git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip.git perf-fixes-for-linus

Thanks,

Ingo

------------------>
Arnaldo Carvalho de Melo (1):
perf archive: Don't try to collect files without a build-id

Frederic Weisbecker (5):
perf lock: Drop the buffers multiplexing dependency
perf: Remove pointless breakpoint union
x86/hw-breakpoints: Remove the name field
hw-breakpoints: Remove stub unthrottle callback
x86/stacktrace: Don't dereference bad frame pointers

Hitoshi Mitake (1):
perf lock: Fix and add misc documentally things

Ingo Molnar (1):
MAINTAINERS: Add Arnaldo as tools/perf/ co-maintainer

Peter Zijlstra (3):
perf, x86: Restrict the ANY flag
perf_events, x86: Fixup fixed counter constraints
perf: Provide generic perf_sample_data initialization

Robert Richter (3):
perf, x86: make IBS macros available in perf_event.h
perf, x86: add some IBS macros to perf_event.h
perf, x86: rename macro in ARCH_PERFMON_EVENTSEL_ENABLE

Tejun Heo (1):
percpu: Add __percpu sparse annotations to hw_breakpoint

Tom Zanussi (2):
perf trace/scripting: Remove extraneous header read
perf trace: Don't use pager if scripting

Will Deacon (1):
perf, ARM: Modify kuser rmb() call to compile for Thumb-2

diff --git a/MAINTAINERS b/MAINTAINERS
index c8a8b1f..14d5c4c 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -4293,6 +4293,7 @@ PERFORMANCE EVENTS SUBSYSTEM
M: Peter Zijlstra <a.p.zijlstra@chello.nl>
M: Paul Mackerras <paulus@samba.org>
M: Ingo Molnar <mingo@elte.hu>
+M: Arnaldo Carvalho de Melo <acme@redhat.com>
S: Supported
F: kernel/perf_event.c
F: include/linux/perf_event.h
diff --git a/arch/arm/kernel/perf_event.c b/arch/arm/kernel/perf_event.c
index c54ceb3..3875d99 100644
--- a/arch/arm/kernel/perf_event.c
+++ b/arch/arm/kernel/perf_event.c
@@ -965,7 +965,7 @@ armv6pmu_handle_irq(int irq_num,
*/
armv6_pmcr_write(pmcr);

- data.addr = 0;
+ perf_sample_data_init(&data, 0);

cpuc = &__get_cpu_var(cpu_hw_events);
for (idx = 0; idx <= armpmu->num_events; ++idx) {
@@ -1945,7 +1945,7 @@ static irqreturn_t armv7pmu_handle_irq(int irq_num, void *dev)
*/
regs = get_irq_regs();

- data.addr = 0;
+ perf_sample_data_init(&data, 0);

cpuc = &__get_cpu_var(cpu_hw_events);
for (idx = 0; idx <= armpmu->num_events; ++idx) {
diff --git a/arch/powerpc/kernel/perf_event.c b/arch/powerpc/kernel/perf_event.c
index b6cf8f1..5120bd4 100644
--- a/arch/powerpc/kernel/perf_event.c
+++ b/arch/powerpc/kernel/perf_event.c
@@ -1164,10 +1164,10 @@ static void record_and_restart(struct perf_event *event, unsigned long val,
* Finally record data if requested.
*/
if (record) {
- struct perf_sample_data data = {
- .addr = ~0ULL,
- .period = event->hw.last_period,
- };
+ struct perf_sample_data data;
+
+ perf_sample_data_init(&data, ~0ULL);
+ data.period = event->hw.last_period;

if (event->attr.sample_type & PERF_SAMPLE_ADDR)
perf_get_data_addr(regs, &data.addr);
diff --git a/arch/sparc/kernel/perf_event.c b/arch/sparc/kernel/perf_event.c
index 9f2b2ba..6504208 100644
--- a/arch/sparc/kernel/perf_event.c
+++ b/arch/sparc/kernel/perf_event.c
@@ -1189,7 +1189,7 @@ static int __kprobes perf_event_nmi_handler(struct notifier_block *self,

regs = args->regs;

- data.addr = 0;
+ perf_sample_data_init(&data, 0);

cpuc = &__get_cpu_var(cpu_hw_events);

diff --git a/arch/x86/include/asm/hw_breakpoint.h b/arch/x86/include/asm/hw_breakpoint.h
index 0675a7c..2a1bd8f 100644
--- a/arch/x86/include/asm/hw_breakpoint.h
+++ b/arch/x86/include/asm/hw_breakpoint.h
@@ -10,7 +10,6 @@
* (display/resolving)
*/
struct arch_hw_breakpoint {
- char *name; /* Contains name of the symbol to set bkpt */
unsigned long address;
u8 len;
u8 type;
diff --git a/arch/x86/include/asm/perf_event.h b/arch/x86/include/asm/perf_event.h
index befd172..db6109a 100644
--- a/arch/x86/include/asm/perf_event.h
+++ b/arch/x86/include/asm/perf_event.h
@@ -18,7 +18,7 @@
#define MSR_ARCH_PERFMON_EVENTSEL0 0x186
#define MSR_ARCH_PERFMON_EVENTSEL1 0x187

-#define ARCH_PERFMON_EVENTSEL0_ENABLE (1 << 22)
+#define ARCH_PERFMON_EVENTSEL_ENABLE (1 << 22)
#define ARCH_PERFMON_EVENTSEL_ANY (1 << 21)
#define ARCH_PERFMON_EVENTSEL_INT (1 << 20)
#define ARCH_PERFMON_EVENTSEL_OS (1 << 17)
@@ -50,7 +50,7 @@
INTEL_ARCH_INV_MASK| \
INTEL_ARCH_EDGE_MASK|\
INTEL_ARCH_UNIT_MASK|\
- INTEL_ARCH_EVTSEL_MASK)
+ INTEL_ARCH_EVENT_MASK)

#define ARCH_PERFMON_UNHALTED_CORE_CYCLES_SEL 0x3c
#define ARCH_PERFMON_UNHALTED_CORE_CYCLES_UMASK (0x00 << 8)
@@ -117,6 +117,18 @@ union cpuid10_edx {
*/
#define X86_PMC_IDX_FIXED_BTS (X86_PMC_IDX_FIXED + 16)

+/* IbsFetchCtl bits/masks */
+#define IBS_FETCH_RAND_EN (1ULL<<57)
+#define IBS_FETCH_VAL (1ULL<<49)
+#define IBS_FETCH_ENABLE (1ULL<<48)
+#define IBS_FETCH_CNT 0xFFFF0000ULL
+#define IBS_FETCH_MAX_CNT 0x0000FFFFULL
+
+/* IbsOpCtl bits */
+#define IBS_OP_CNT_CTL (1ULL<<19)
+#define IBS_OP_VAL (1ULL<<18)
+#define IBS_OP_ENABLE (1ULL<<17)
+#define IBS_OP_MAX_CNT 0x0000FFFFULL

#ifdef CONFIG_PERF_EVENTS
extern void init_hw_perf_events(void);
diff --git a/arch/x86/kernel/cpu/perf_event.c b/arch/x86/kernel/cpu/perf_event.c
index b1fbdee..42aafd1 100644
--- a/arch/x86/kernel/cpu/perf_event.c
+++ b/arch/x86/kernel/cpu/perf_event.c
@@ -73,10 +73,10 @@ struct debug_store {
struct event_constraint {
union {
unsigned long idxmsk[BITS_TO_LONGS(X86_PMC_IDX_MAX)];
- u64 idxmsk64[1];
+ u64 idxmsk64;
};
- int code;
- int cmask;
+ u64 code;
+ u64 cmask;
int weight;
};

@@ -103,7 +103,7 @@ struct cpu_hw_events {
};

#define __EVENT_CONSTRAINT(c, n, m, w) {\
- { .idxmsk64[0] = (n) }, \
+ { .idxmsk64 = (n) }, \
.code = (c), \
.cmask = (m), \
.weight = (w), \
@@ -116,7 +116,7 @@ struct cpu_hw_events {
EVENT_CONSTRAINT(c, n, INTEL_ARCH_EVTSEL_MASK)

#define FIXED_EVENT_CONSTRAINT(c, n) \
- EVENT_CONSTRAINT(c, n, INTEL_ARCH_FIXED_MASK)
+ EVENT_CONSTRAINT(c, (1ULL << (32+n)), INTEL_ARCH_FIXED_MASK)

#define EVENT_CONSTRAINT_END \
EVENT_CONSTRAINT(0, 0, 0)
@@ -503,6 +503,9 @@ static int __hw_perf_event_init(struct perf_event *event)
*/
if (attr->type == PERF_TYPE_RAW) {
hwc->config |= x86_pmu.raw_event(attr->config);
+ if ((hwc->config & ARCH_PERFMON_EVENTSEL_ANY) &&
+ perf_paranoid_cpu() && !capable(CAP_SYS_ADMIN))
+ return -EACCES;
return 0;
}

@@ -553,9 +556,9 @@ static void x86_pmu_disable_all(void)
if (!test_bit(idx, cpuc->active_mask))
continue;
rdmsrl(x86_pmu.eventsel + idx, val);
- if (!(val & ARCH_PERFMON_EVENTSEL0_ENABLE))
+ if (!(val & ARCH_PERFMON_EVENTSEL_ENABLE))
continue;
- val &= ~ARCH_PERFMON_EVENTSEL0_ENABLE;
+ val &= ~ARCH_PERFMON_EVENTSEL_ENABLE;
wrmsrl(x86_pmu.eventsel + idx, val);
}
}
@@ -590,7 +593,7 @@ static void x86_pmu_enable_all(void)
continue;

val = event->hw.config;
- val |= ARCH_PERFMON_EVENTSEL0_ENABLE;
+ val |= ARCH_PERFMON_EVENTSEL_ENABLE;
wrmsrl(x86_pmu.eventsel + idx, val);
}
}
@@ -612,8 +615,8 @@ static int x86_schedule_events(struct cpu_hw_events *cpuc, int n, int *assign)
bitmap_zero(used_mask, X86_PMC_IDX_MAX);

for (i = 0; i < n; i++) {
- constraints[i] =
- x86_pmu.get_event_constraints(cpuc, cpuc->event_list[i]);
+ c = x86_pmu.get_event_constraints(cpuc, cpuc->event_list[i]);
+ constraints[i] = c;
}

/*
@@ -853,7 +856,7 @@ void hw_perf_enable(void)
static inline void __x86_pmu_enable_event(struct hw_perf_event *hwc, int idx)
{
(void)checking_wrmsrl(hwc->config_base + idx,
- hwc->config | ARCH_PERFMON_EVENTSEL0_ENABLE);
+ hwc->config | ARCH_PERFMON_EVENTSEL_ENABLE);
}

static inline void x86_pmu_disable_event(struct hw_perf_event *hwc, int idx)
@@ -1094,8 +1097,7 @@ static int x86_pmu_handle_irq(struct pt_regs *regs)
int idx, handled = 0;
u64 val;

- data.addr = 0;
- data.raw = NULL;
+ perf_sample_data_init(&data, 0);

cpuc = &__get_cpu_var(cpu_hw_events);

@@ -1347,6 +1349,7 @@ static void __init pmu_check_apic(void)

void __init init_hw_perf_events(void)
{
+ struct event_constraint *c;
int err;

pr_info("Performance Events: ");
@@ -1395,6 +1398,16 @@ void __init init_hw_perf_events(void)
__EVENT_CONSTRAINT(0, (1ULL << x86_pmu.num_events) - 1,
0, x86_pmu.num_events);

+ if (x86_pmu.event_constraints) {
+ for_each_event_constraint(c, x86_pmu.event_constraints) {
+ if (c->cmask != INTEL_ARCH_FIXED_MASK)
+ continue;
+
+ c->idxmsk64 |= (1ULL << x86_pmu.num_events) - 1;
+ c->weight += x86_pmu.num_events;
+ }
+ }
+
pr_info("... version: %d\n", x86_pmu.version);
pr_info("... bit width: %d\n", x86_pmu.event_bits);
pr_info("... generic registers: %d\n", x86_pmu.num_events);
diff --git a/arch/x86/kernel/cpu/perf_event_intel.c b/arch/x86/kernel/cpu/perf_event_intel.c
index 977e754..44b60c8 100644
--- a/arch/x86/kernel/cpu/perf_event_intel.c
+++ b/arch/x86/kernel/cpu/perf_event_intel.c
@@ -1,7 +1,7 @@
#ifdef CONFIG_CPU_SUP_INTEL

/*
- * Intel PerfMon v3. Used on Core2 and later.
+ * Intel PerfMon, used on Core and later.
*/
static const u64 intel_perfmon_event_map[] =
{
@@ -27,8 +27,14 @@ static struct event_constraint intel_core_event_constraints[] =

static struct event_constraint intel_core2_event_constraints[] =
{
- FIXED_EVENT_CONSTRAINT(0xc0, (0x3|(1ULL<<32))), /* INSTRUCTIONS_RETIRED */
- FIXED_EVENT_CONSTRAINT(0x3c, (0x3|(1ULL<<33))), /* UNHALTED_CORE_CYCLES */
+ FIXED_EVENT_CONSTRAINT(0x00c0, 0), /* INST_RETIRED.ANY */
+ FIXED_EVENT_CONSTRAINT(0x003c, 1), /* CPU_CLK_UNHALTED.CORE */
+ /*
+ * Core2 has Fixed Counter 2 listed as CPU_CLK_UNHALTED.REF and event
+ * 0x013c as CPU_CLK_UNHALTED.BUS and specifies there is a fixed
+ * ratio between these counters.
+ */
+ /* FIXED_EVENT_CONSTRAINT(0x013c, 2), CPU_CLK_UNHALTED.REF */
INTEL_EVENT_CONSTRAINT(0x10, 0x1), /* FP_COMP_OPS_EXE */
INTEL_EVENT_CONSTRAINT(0x11, 0x2), /* FP_ASSIST */
INTEL_EVENT_CONSTRAINT(0x12, 0x2), /* MUL */
@@ -37,14 +43,16 @@ static struct event_constraint intel_core2_event_constraints[] =
INTEL_EVENT_CONSTRAINT(0x18, 0x1), /* IDLE_DURING_DIV */
INTEL_EVENT_CONSTRAINT(0x19, 0x2), /* DELAYED_BYPASS */
INTEL_EVENT_CONSTRAINT(0xa1, 0x1), /* RS_UOPS_DISPATCH_CYCLES */
+ INTEL_EVENT_CONSTRAINT(0xc9, 0x1), /* ITLB_MISS_RETIRED (T30-9) */
INTEL_EVENT_CONSTRAINT(0xcb, 0x1), /* MEM_LOAD_RETIRED */
EVENT_CONSTRAINT_END
};

static struct event_constraint intel_nehalem_event_constraints[] =
{
- FIXED_EVENT_CONSTRAINT(0xc0, (0xf|(1ULL<<32))), /* INSTRUCTIONS_RETIRED */
- FIXED_EVENT_CONSTRAINT(0x3c, (0xf|(1ULL<<33))), /* UNHALTED_CORE_CYCLES */
+ FIXED_EVENT_CONSTRAINT(0x00c0, 0), /* INST_RETIRED.ANY */
+ FIXED_EVENT_CONSTRAINT(0x003c, 1), /* CPU_CLK_UNHALTED.CORE */
+ /* FIXED_EVENT_CONSTRAINT(0x013c, 2), CPU_CLK_UNHALTED.REF */
INTEL_EVENT_CONSTRAINT(0x40, 0x3), /* L1D_CACHE_LD */
INTEL_EVENT_CONSTRAINT(0x41, 0x3), /* L1D_CACHE_ST */
INTEL_EVENT_CONSTRAINT(0x42, 0x3), /* L1D_CACHE_LOCK */
@@ -58,8 +66,9 @@ static struct event_constraint intel_nehalem_event_constraints[] =

static struct event_constraint intel_westmere_event_constraints[] =
{
- FIXED_EVENT_CONSTRAINT(0xc0, (0xf|(1ULL<<32))), /* INSTRUCTIONS_RETIRED */
- FIXED_EVENT_CONSTRAINT(0x3c, (0xf|(1ULL<<33))), /* UNHALTED_CORE_CYCLES */
+ FIXED_EVENT_CONSTRAINT(0x00c0, 0), /* INST_RETIRED.ANY */
+ FIXED_EVENT_CONSTRAINT(0x003c, 1), /* CPU_CLK_UNHALTED.CORE */
+ /* FIXED_EVENT_CONSTRAINT(0x013c, 2), CPU_CLK_UNHALTED.REF */
INTEL_EVENT_CONSTRAINT(0x51, 0x3), /* L1D */
INTEL_EVENT_CONSTRAINT(0x60, 0x1), /* OFFCORE_REQUESTS_OUTSTANDING */
INTEL_EVENT_CONSTRAINT(0x63, 0x3), /* CACHE_LOCK_CYCLES */
@@ -68,8 +77,9 @@ static struct event_constraint intel_westmere_event_constraints[] =

static struct event_constraint intel_gen_event_constraints[] =
{
- FIXED_EVENT_CONSTRAINT(0xc0, (0x3|(1ULL<<32))), /* INSTRUCTIONS_RETIRED */
- FIXED_EVENT_CONSTRAINT(0x3c, (0x3|(1ULL<<33))), /* UNHALTED_CORE_CYCLES */
+ FIXED_EVENT_CONSTRAINT(0x00c0, 0), /* INST_RETIRED.ANY */
+ FIXED_EVENT_CONSTRAINT(0x003c, 1), /* CPU_CLK_UNHALTED.CORE */
+ /* FIXED_EVENT_CONSTRAINT(0x013c, 2), CPU_CLK_UNHALTED.REF */
EVENT_CONSTRAINT_END
};

@@ -580,10 +590,9 @@ static void intel_pmu_drain_bts_buffer(void)

ds->bts_index = ds->bts_buffer_base;

+ perf_sample_data_init(&data, 0);

data.period = event->hw.last_period;
- data.addr = 0;
- data.raw = NULL;
regs.ip = 0;

/*
@@ -732,8 +741,7 @@ static int intel_pmu_handle_irq(struct pt_regs *regs)
int bit, loops;
u64 ack, status;

- data.addr = 0;
- data.raw = NULL;
+ perf_sample_data_init(&data, 0);

cpuc = &__get_cpu_var(cpu_hw_events);

@@ -935,7 +943,7 @@ static __init int intel_pmu_init(void)
x86_pmu.event_constraints = intel_nehalem_event_constraints;
pr_cont("Nehalem/Corei7 events, ");
break;
- case 28:
+ case 28: /* Atom */
memcpy(hw_cache_event_ids, atom_hw_cache_event_ids,
sizeof(hw_cache_event_ids));

@@ -951,6 +959,7 @@ static __init int intel_pmu_init(void)
x86_pmu.event_constraints = intel_westmere_event_constraints;
pr_cont("Westmere events, ");
break;
+
default:
/*
* default constraints for v2 and up
diff --git a/arch/x86/kernel/cpu/perf_event_p6.c b/arch/x86/kernel/cpu/perf_event_p6.c
index 1ca5ba0..a4e67b9 100644
--- a/arch/x86/kernel/cpu/perf_event_p6.c
+++ b/arch/x86/kernel/cpu/perf_event_p6.c
@@ -62,7 +62,7 @@ static void p6_pmu_disable_all(void)

/* p6 only has one enable register */
rdmsrl(MSR_P6_EVNTSEL0, val);
- val &= ~ARCH_PERFMON_EVENTSEL0_ENABLE;
+ val &= ~ARCH_PERFMON_EVENTSEL_ENABLE;
wrmsrl(MSR_P6_EVNTSEL0, val);
}

@@ -72,7 +72,7 @@ static void p6_pmu_enable_all(void)

/* p6 only has one enable register */
rdmsrl(MSR_P6_EVNTSEL0, val);
- val |= ARCH_PERFMON_EVENTSEL0_ENABLE;
+ val |= ARCH_PERFMON_EVENTSEL_ENABLE;
wrmsrl(MSR_P6_EVNTSEL0, val);
}

@@ -83,7 +83,7 @@ p6_pmu_disable_event(struct hw_perf_event *hwc, int idx)
u64 val = P6_NOP_EVENT;

if (cpuc->enabled)
- val |= ARCH_PERFMON_EVENTSEL0_ENABLE;
+ val |= ARCH_PERFMON_EVENTSEL_ENABLE;

(void)checking_wrmsrl(hwc->config_base + idx, val);
}
@@ -95,7 +95,7 @@ static void p6_pmu_enable_event(struct hw_perf_event *hwc, int idx)

val = hwc->config;
if (cpuc->enabled)
- val |= ARCH_PERFMON_EVENTSEL0_ENABLE;
+ val |= ARCH_PERFMON_EVENTSEL_ENABLE;

(void)checking_wrmsrl(hwc->config_base + idx, val);
}
diff --git a/arch/x86/kernel/cpu/perfctr-watchdog.c b/arch/x86/kernel/cpu/perfctr-watchdog.c
index 74f4e85..fb329e9 100644
--- a/arch/x86/kernel/cpu/perfctr-watchdog.c
+++ b/arch/x86/kernel/cpu/perfctr-watchdog.c
@@ -680,7 +680,7 @@ static int setup_intel_arch_watchdog(unsigned nmi_hz)
cpu_nmi_set_wd_enabled();

apic_write(APIC_LVTPC, APIC_DM_NMI);
- evntsel |= ARCH_PERFMON_EVENTSEL0_ENABLE;
+ evntsel |= ARCH_PERFMON_EVENTSEL_ENABLE;
wrmsr(evntsel_msr, evntsel, 0);
intel_arch_wd_ops.checkbit = 1ULL << (eax.split.bit_width - 1);
return 1;
diff --git a/arch/x86/kernel/dumpstack_64.c b/arch/x86/kernel/dumpstack_64.c
index dce99ab..d5e2a2e 100644
--- a/arch/x86/kernel/dumpstack_64.c
+++ b/arch/x86/kernel/dumpstack_64.c
@@ -120,9 +120,15 @@ fixup_bp_irq_link(unsigned long bp, unsigned long *stack,
{
#ifdef CONFIG_FRAME_POINTER
struct stack_frame *frame = (struct stack_frame *)bp;
+ unsigned long next;

- if (!in_irq_stack(stack, irq_stack, irq_stack_end))
- return (unsigned long)frame->next_frame;
+ if (!in_irq_stack(stack, irq_stack, irq_stack_end)) {
+ if (!probe_kernel_address(&frame->next_frame, next))
+ return next;
+ else
+ WARN_ONCE(1, "Perf: bad frame pointer = %p in "
+ "callchain\n", &frame->next_frame);
+ }

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Thursday, March 11, 2010

linux.kernel - 25 new messages in 18 topics - digest

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