linux.kernel - 26 new messages in 22 topics - digest

linux.kernel
http://groups.google.com/group/linux.kernel?hl=en

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Today's topics:

* power: Replace printks with pr_* routines - 1 messages, 1 author
http://groups.google.com/group/linux.kernel/t/4ddfd663f22c3acf?hl=en
* mfd: wm5110: Correct default for register LDO2 Control 1 - 1 messages, 1
author
http://groups.google.com/group/linux.kernel/t/f253bcdd46fbfba7?hl=en
* dmaengine: Add support for BCM2835 - 2 messages, 2 authors
http://groups.google.com/group/linux.kernel/t/b23d68fe8dd6e857?hl=en
* ASoC: fsl_ssi: Add monaural audio support for non-ac97 interface - 1
messages, 1 author
http://groups.google.com/group/linux.kernel/t/5acc875586bac610?hl=en
* mfd: rtsx: add card reader rtl8402 - 1 messages, 1 author
http://groups.google.com/group/linux.kernel/t/55d5122dd95aee0a?hl=en
* gfs2: simplify current_tail() via list_last_entry_or_null() - 2 messages, 1
author
http://groups.google.com/group/linux.kernel/t/3cc3d537729b32a2?hl=en
* arm64: Kprobes with single stepping support - 2 messages, 1 author
http://groups.google.com/group/linux.kernel/t/a4ea625f4df063b1?hl=en
* usb: phy: msm: Add device tree support and binding information - 2 messages,
1 author
http://groups.google.com/group/linux.kernel/t/531d1582b5d30b15?hl=en
* perf tip: fails to convert comm - 1 messages, 1 author
http://groups.google.com/group/linux.kernel/t/5eff5c722c706d30?hl=en
* rtmutex: take the waiter lock with irqs off - 1 messages, 1 author
http://groups.google.com/group/linux.kernel/t/549892c09b054514?hl=en
* randconfig build error with next-20131115, in drivers/gpu/drm/nouveau - 1
messages, 1 author
http://groups.google.com/group/linux.kernel/t/504935f0303d8c3f?hl=en
* perf record: mmap output file - v5 - 1 messages, 1 author
http://groups.google.com/group/linux.kernel/t/d3b5cbed001064d3?hl=en
* ARM64: perf: add support for the perf registers and dwarf unwinding - 1
messages, 1 author
http://groups.google.com/group/linux.kernel/t/40ed51b360fed382?hl=en
* ASoC: fsl: imx-ssi: omit ssi counter to avoid harm in unbalanced situation -
1 messages, 1 author
http://groups.google.com/group/linux.kernel/t/e9f4d1db03bc8dd2?hl=en
* kprobes: Prohibit probing on .entry.text code - 1 messages, 1 author
http://groups.google.com/group/linux.kernel/t/ad100e254faca6ee?hl=en
* [FIX] init/Kconfig: fix option to disable kernel compression - 1 messages, 1
author
http://groups.google.com/group/linux.kernel/t/4b883f95bd42e081?hl=en
* cris: Use Kbuild logic to include <asm-generic/sections.h> - 1 messages, 1
author
http://groups.google.com/group/linux.kernel/t/e750c2d1614cdd09?hl=en
* init/Kconfig: add option to disable kernel compression - 1 messages, 1
author
http://groups.google.com/group/linux.kernel/t/560b8897abd73237?hl=en
* perf sw_event related lockup - 1 messages, 1 author
http://groups.google.com/group/linux.kernel/t/eda3584e3bbf90ad?hl=en
* fs: partitions: efi: Fix bound check - 1 messages, 1 author
http://groups.google.com/group/linux.kernel/t/c5ece555d9fef49f?hl=en
* Early use of boot service memory - 1 messages, 1 author
http://groups.google.com/group/linux.kernel/t/51430f738d40f129?hl=en
* perf/trace properly use u64 to hold event_id - 1 messages, 1 author
http://groups.google.com/group/linux.kernel/t/129831e5f0562b2d?hl=en

==============================================================================
TOPIC: power: Replace printks with pr_* routines
http://groups.google.com/group/linux.kernel/t/4ddfd663f22c3acf?hl=en
==============================================================================

== 1 of 1 ==
Date: Fri, Nov 15 2013 8:20 am
From: Shuah Khan


Replaced printks with pr_* routines. dev_* routines could have been used,
but chose to use pr_* to avoid breaking scripts that might be relying on
a specific text.

Signed-off-by: Shuah Khan <shuah.kh@samsung.com>
---
drivers/base/power/main.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/drivers/base/power/main.c b/drivers/base/power/main.c
index 9f098a8..43d5dcf 100644
--- a/drivers/base/power/main.c
+++ b/drivers/base/power/main.c
@@ -349,7 +349,7 @@ static void pm_dev_dbg(struct device *dev, pm_message_t state, char *info)
static void pm_dev_err(struct device *dev, pm_message_t state, char *info,
int error)
{
- printk(KERN_ERR "PM: Device %s failed to %s%s: error %d\n",
+ pr_err("PM: Device %s failed to %s%s: error %d\n",
dev_name(dev), pm_verb(state.event), info, error);
}

@@ -1308,7 +1308,7 @@ int dpm_prepare(pm_message_t state)
error = 0;
continue;
}
- printk(KERN_INFO "PM: Device %s not prepared "
+ pr_info("PM: Device %s not prepared "
"for power transition: code %d\n",
dev_name(dev), error);
put_device(dev);
@@ -1347,7 +1347,7 @@ EXPORT_SYMBOL_GPL(dpm_suspend_start);
void __suspend_report_result(const char *function, void *fn, int ret)
{
if (ret)
- printk(KERN_ERR "%s(): %pF returns %d\n", function, fn, ret);
+ pr_err("%s(): %pF returns %d\n", function, fn, ret);
}
EXPORT_SYMBOL_GPL(__suspend_report_result);

--
1.8.3.2

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==============================================================================
TOPIC: mfd: wm5110: Correct default for register LDO2 Control 1
http://groups.google.com/group/linux.kernel/t/f253bcdd46fbfba7?hl=en
==============================================================================

== 1 of 1 ==
Date: Fri, Nov 15 2013 8:30 am
From: Lee Jones


On Fri, 15 Nov 2013, Charles Keepax wrote:

> Signed-off-by: Charles Keepax <ckeepax@opensource.wolfsonmicro.com>
> ---
> drivers/mfd/wm5110-tables.c | 2 +-
> 1 files changed, 1 insertions(+), 1 deletions(-)

Applied, thanks.

> diff --git a/drivers/mfd/wm5110-tables.c b/drivers/mfd/wm5110-tables.c
> index bf8b3b5..d3d7531 100644
> --- a/drivers/mfd/wm5110-tables.c
> +++ b/drivers/mfd/wm5110-tables.c
> @@ -504,7 +504,7 @@ static const struct reg_default wm5110_reg_default[] = {
> { 0x000001AA, 0x0004 }, /* R426 - FLL2 GPIO Clock */
> { 0x00000200, 0x0006 }, /* R512 - Mic Charge Pump 1 */
> { 0x00000210, 0x0184 }, /* R528 - LDO1 Control 1 */
> - { 0x00000213, 0x0344 }, /* R531 - LDO2 Control 1 */
> + { 0x00000213, 0x03E4 }, /* R531 - LDO2 Control 1 */
> { 0x00000218, 0x01A6 }, /* R536 - Mic Bias Ctrl 1 */
> { 0x00000219, 0x01A6 }, /* R537 - Mic Bias Ctrl 2 */
> { 0x0000021A, 0x01A6 }, /* R538 - Mic Bias Ctrl 3 */

--
Lee Jones
Linaro STMicroelectronics Landing Team Lead
Linaro.org │ Open source software for ARM SoCs
Follow Linaro: Facebook | Twitter | Blog
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==============================================================================
TOPIC: dmaengine: Add support for BCM2835
http://groups.google.com/group/linux.kernel/t/b23d68fe8dd6e857?hl=en
==============================================================================

== 1 of 2 ==
Date: Fri, Nov 15 2013 8:30 am
From: Florian Meier


Add support for DMA controller of BCM2835 as used in the Raspberry Pi.
Currently it only supports cyclic DMA.

Signed-off-by: Florian Meier <florian.meier@koalo.de>
---

Fifth version with better error handling in probe.

.../devicetree/bindings/dma/bcm2835-dma.txt | 56 ++
drivers/dma/Kconfig | 6 +
drivers/dma/Makefile | 1 +
drivers/dma/bcm2835-dma.c | 749 +++++++++++++++++++++
4 files changed, 812 insertions(+)
create mode 100644 Documentation/devicetree/bindings/dma/bcm2835-dma.txt
create mode 100644 drivers/dma/bcm2835-dma.c

diff --git a/Documentation/devicetree/bindings/dma/bcm2835-dma.txt b/Documentation/devicetree/bindings/dma/bcm2835-dma.txt
new file mode 100644
index 0000000..7d91019
--- /dev/null
+++ b/Documentation/devicetree/bindings/dma/bcm2835-dma.txt
@@ -0,0 +1,56 @@
+* BCM2835 DMA controller
+
+Required properties:
+- compatible: Should be "brcm,bcm2835-dma".
+- reg: Should contain DMA registers location and length.
+- interrupts: Should contain the DMA interrupts associated
+ to the DMA channels in ascending order.
+ First cell is the IRQ bank.
+ Second cell is the IRQ number.
+- #dma-cells: Must be <1>, used to represent the number of integer cells in
+ the dmas property of client devices.
+- brcm,dma-channel-mask: Bit mask representing the channels
+ not used by the firmware.
+
+Example:
+
+dma: dma@7e007000 {
+ compatible = "brcm,bcm2835-dma";
+ reg = <0x7e007000 0xf00>;
+ interrupts = <1 16
+ 1 17
+ 1 18
+ 1 19
+ 1 20
+ 1 21
+ 1 22
+ 1 23
+ 1 24
+ 1 25
+ 1 26
+ 1 27
+ 1 28>;
+
+ #dma-cells = <1>;
+ brcm,dma-channel-mask = <0x7f35>;
+};
+
+DMA clients connected to the BCM2835 DMA controller must use the format
+described in the dma.txt file, using a two-cell specifier for each channel:
+a phandle plus one integer cells.
+The two cells in order are:
+
+1. A phandle pointing to the DMA controller.
+2. The DREQ number.
+
+Example:
+
+bcm2835_i2s: i2s@7e203000 {
+ compatible = "brcm,bcm2835-i2s";
+ reg = < 0x7e203000 0x20
+ 0x7e101098 0x02>;
+
+ dmas = <&dma 2
+ &dma 3>;
+ dma-names = "tx", "rx";
+};
diff --git a/drivers/dma/Kconfig b/drivers/dma/Kconfig
index c61a6ec..880e723 100644
--- a/drivers/dma/Kconfig
+++ b/drivers/dma/Kconfig
@@ -300,6 +300,12 @@ config DMA_OMAP
select DMA_ENGINE
select DMA_VIRTUAL_CHANNELS

+config DMA_BCM2835
+ tristate "BCM2835 DMA engine support"
+ depends on (ARCH_BCM2835 || MACH_BCM2708)
+ select DMA_ENGINE
+ select DMA_VIRTUAL_CHANNELS
+
config TI_CPPI41
tristate "AM33xx CPPI41 DMA support"
depends on ARCH_OMAP
diff --git a/drivers/dma/Makefile b/drivers/dma/Makefile
index 0ce2da9..0a6f08e 100644
--- a/drivers/dma/Makefile
+++ b/drivers/dma/Makefile
@@ -38,6 +38,7 @@ obj-$(CONFIG_EP93XX_DMA) += ep93xx_dma.o
obj-$(CONFIG_DMA_SA11X0) += sa11x0-dma.o
obj-$(CONFIG_MMP_TDMA) += mmp_tdma.o
obj-$(CONFIG_DMA_OMAP) += omap-dma.o
+obj-$(CONFIG_DMA_BCM2835) += bcm2835-dma.o
obj-$(CONFIG_MMP_PDMA) += mmp_pdma.o
obj-$(CONFIG_DMA_JZ4740) += dma-jz4740.o
obj-$(CONFIG_TI_CPPI41) += cppi41.o
diff --git a/drivers/dma/bcm2835-dma.c b/drivers/dma/bcm2835-dma.c
new file mode 100644
index 0000000..bc26398
--- /dev/null
+++ b/drivers/dma/bcm2835-dma.c
@@ -0,0 +1,749 @@
+/*
+ * BCM2835 DMA engine support
+ *
+ * This driver only supports cyclic DMA transfers
+ * as needed for the I2S module.
+ *
+ * Author: Florian Meier, <florian.meier@koalo.de>
+ * Copyright 2013
+ *
+ * based on
+ * OMAP DMAengine support by Russell King
+ *
+ * BCM2708 DMA Driver
+ * Copyright (C) 2010 Broadcom
+ *
+ * Raspberry Pi PCM I2S ALSA Driver
+ * Copyright (c) by Phil Poole 2013
+ *
+ * MARVELL MMP Peripheral DMA Driver
+ * Copyright 2012 Marvell International Ltd.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+#include <linux/dmaengine.h>
+#include <linux/dma-mapping.h>
+#include <linux/err.h>
+#include <linux/init.h>
+#include <linux/interrupt.h>
+#include <linux/list.h>
+#include <linux/module.h>
+#include <linux/platform_device.h>
+#include <linux/slab.h>
+#include <linux/io.h>
+#include <linux/spinlock.h>
+#include <linux/of.h>
+#include <linux/of_dma.h>
+
+#include "virt-dma.h"
+
+struct bcm2835_dmadev {
+ struct dma_device ddev;
+ spinlock_t lock;
+ void __iomem *dma_base;
+ struct device_dma_parameters dma_parms;
+};
+
+struct bcm2835_dma_cb {
+ uint32_t info;
+ uint32_t src;
+ uint32_t dst;
+ uint32_t length;
+ uint32_t stride;
+ uint32_t next;
+ uint32_t pad[2];
+};
+
+struct bcm2835_chan {
+ struct virt_dma_chan vc;
+ struct list_head node;
+
+ struct dma_slave_config cfg;
+ bool cyclic;
+ unsigned dreq;
+
+ int dma_ch;
+ struct bcm2835_desc *desc;
+
+ void __iomem *dma_chan_base;
+ int dma_irq_number;
+};
+
+struct bcm2835_desc {
+ struct virt_dma_desc vd;
+ enum dma_transfer_direction dir;
+
+ unsigned int control_block_size;
+ struct bcm2835_dma_cb *control_block_base;
+ dma_addr_t control_block_base_phys;
+
+ unsigned frames;
+ size_t size;
+};
+
+#define BCM2835_DMA_CS 0x00
+#define BCM2835_DMA_ADDR 0x04
+#define BCM2835_DMA_SOURCE_AD 0x0c
+#define BCM2835_DMA_DEST_AD 0x10
+#define BCM2835_DMA_NEXTCB 0x1C
+
+/* DMA CS Control and Status bits */
+#define BCM2835_DMA_ACTIVE (1 << 0)
+#define BCM2835_DMA_INT (1 << 2)
+#define BCM2835_DMA_ISPAUSED (1 << 4) /* Pause requested or not active */
+#define BCM2835_DMA_ISHELD (1 << 5) /* Is held by DREQ flow control */
+#define BCM2835_DMA_ERR (1 << 8)
+#define BCM2835_DMA_ABORT (1 << 30) /* stop current CB, go to next, WO */
+#define BCM2835_DMA_RESET (1 << 31) /* WO, self clearing */
+
+#define BCM2835_DMA_INT_EN (1 << 0)
+#define BCM2835_DMA_D_INC (1 << 4)
+#define BCM2835_DMA_D_DREQ (1 << 6)
+#define BCM2835_DMA_S_INC (1 << 8)
+#define BCM2835_DMA_S_DREQ (1 << 6)
+
+#define BCM2835_DMA_PER_MAP(x) ((x) << 16)
+
+#define BCM2835_DMA_DATA_TYPE_S8 1
+#define BCM2835_DMA_DATA_TYPE_S16 2
+#define BCM2835_DMA_DATA_TYPE_S32 4
+#define BCM2835_DMA_DATA_TYPE_S128 16
+
+/* valid only for channels 0 - 14, 15 has its own base address */
+#define BCM2835_DMA_CHAN(n) ((n) << 8) /* base address */
+#define BCM2835_DMA_CHANIO(dma_base, n) ((dma_base) + BCM2835_DMA_CHAN(n))
+
+static inline struct bcm2835_dmadev *to_bcm2835_dma_dev(struct dma_device *d)
+{
+ return container_of(d, struct bcm2835_dmadev, ddev);
+}
+
+static inline struct bcm2835_chan *to_bcm2835_dma_chan(struct dma_chan *c)
+{
+ return container_of(c, struct bcm2835_chan, vc.chan);
+}
+
+static inline struct bcm2835_desc *to_bcm2835_dma_desc(
+ struct dma_async_tx_descriptor *t)
+{
+ return container_of(t, struct bcm2835_desc, vd.tx);
+}
+
+static void bcm2835_dma_desc_free(struct virt_dma_desc *vd)
+{
+ struct bcm2835_desc *desc = container_of(vd, struct bcm2835_desc, vd);
+ dma_free_coherent(desc->vd.tx.chan->device->dev,
+ desc->control_block_size,
+ desc->control_block_base,
+ desc->control_block_base_phys);
+ kfree(desc);
+}
+
+static int bcm2835_dma_abort(void __iomem *dma_chan_base)
+{
+ unsigned long int cs;
+ int rc = 0;
+
+ cs = readl(dma_chan_base + BCM2835_DMA_CS);
+
+ if (BCM2835_DMA_ACTIVE & cs) {
+ long int timeout = 10000;
+
+ /* write 0 to the active bit - pause the DMA */
+ writel(0, dma_chan_base + BCM2835_DMA_CS);
+
+ /* wait for any current AXI transfer to complete */
+ while ((cs & BCM2835_DMA_ISPAUSED) && --timeout >= 0)
+ cs = readl(dma_chan_base + BCM2835_DMA_CS);
+
+ if (cs & BCM2835_DMA_ISPAUSED) {
+ /* we'll un-pause when we set of our next DMA */
+ rc = -ETIMEDOUT;
+
+ } else if (BCM2835_DMA_ACTIVE & cs) {
+ /* terminate the control block chain */
+ writel(0, dma_chan_base + BCM2835_DMA_NEXTCB);
+
+ /* abort the whole DMA */
+ writel(BCM2835_DMA_ABORT | BCM2835_DMA_ACTIVE,
+ dma_chan_base + BCM2835_DMA_CS);
+ }
+ }
+
+ return rc;
+}
+
+static void bcm2835_dma_start_desc(struct bcm2835_chan *c)
+{
+ struct virt_dma_desc *vd = vchan_next_desc(&c->vc);
+ struct bcm2835_desc *d;
+
+ if (!vd) {
+ c->desc = NULL;
+ return;
+ }
+
+ list_del(&vd->node);
+
+ c->desc = d = to_bcm2835_dma_desc(&vd->tx);
+
+ dsb(); /* ARM data synchronization (push) operation */
+
+ writel(d->control_block_base_phys, c->dma_chan_base + BCM2835_DMA_ADDR);
+ writel(BCM2835_DMA_ACTIVE, c->dma_chan_base + BCM2835_DMA_CS);
+}
+
+static irqreturn_t bcm2835_dma_callback(int irq, void *data)
+{
+ struct bcm2835_chan *c = data;
+ struct bcm2835_desc *d;
+ unsigned long flags;
+
+ spin_lock_irqsave(&c->vc.lock, flags);
+
+ /* acknowledge interrupt */
+ writel(BCM2835_DMA_INT, c->dma_chan_base + BCM2835_DMA_CS);
+
+ d = c->desc;
+
+ if (d) {
+ /* TODO Only works for cyclic DMA */
+ vchan_cyclic_callback(&d->vd);
+ }
+
+ /* keep the DMA engine running */
+ dsb(); /* ARM synchronization barrier */
+ writel(BCM2835_DMA_ACTIVE, c->dma_chan_base + BCM2835_DMA_CS);
+
+ spin_unlock_irqrestore(&c->vc.lock, flags);
+
+ return IRQ_HANDLED;
+}
+
+static int bcm2835_dma_alloc_chan_resources(struct dma_chan *chan)
+{
+ struct bcm2835_chan *c = to_bcm2835_dma_chan(chan);
+
+ dev_dbg(c->vc.chan.device->dev,
+ "Allocating DMA channel %i\n", c->dma_ch);
+
+ return request_irq(c->dma_irq_number,
+ bcm2835_dma_callback, 0, "DMA IRQ", c);
+}
+
+static void bcm2835_dma_free_chan_resources(struct dma_chan *chan)
+{
+ struct bcm2835_chan *c = to_bcm2835_dma_chan(chan);
+
+ vchan_free_chan_resources(&c->vc);
+ free_irq(c->dma_irq_number, c);
+
+ dev_dbg(c->vc.chan.device->dev, "Freeing DMA channel %u\n", c->dma_ch);
+}
+
+static size_t bcm2835_dma_desc_size(struct bcm2835_desc *d)
+{
+ return d->size;
+}
+
+static size_t bcm2835_dma_desc_size_pos(struct bcm2835_desc *d, dma_addr_t addr)
+{
+ unsigned i;
+ size_t size;
+
+ for (size = i = 0; i < d->frames; i++) {
+ struct bcm2835_dma_cb *control_block =
+ &d->control_block_base[i];
+ size_t this_size = control_block->length;
+ dma_addr_t dma;
+
+ if (d->dir == DMA_DEV_TO_MEM)
+ dma = control_block->dst;
+ else
+ dma = control_block->src;
+
+ if (size)
+ size += this_size;
+ else if (addr >= dma && addr < dma + this_size)
+ size += dma + this_size - addr;
+ }
+
+ return size;
+}
+
+static enum dma_status bcm2835_dma_tx_status(struct dma_chan *chan,
+ dma_cookie_t cookie, struct dma_tx_state *txstate)
+{
+ struct bcm2835_chan *c = to_bcm2835_dma_chan(chan);
+ struct virt_dma_desc *vd;
+ enum dma_status ret;
+ unsigned long flags;
+
+ ret = dma_cookie_status(chan, cookie, txstate);
+ if (ret == DMA_SUCCESS || !txstate)
+ return ret;
+
+ spin_lock_irqsave(&c->vc.lock, flags);
+ vd = vchan_find_desc(&c->vc, cookie);
+ if (vd) {
+ txstate->residue =
+ bcm2835_dma_desc_size(to_bcm2835_dma_desc(&vd->tx));
+ } else if (c->desc && c->desc->vd.tx.cookie == cookie) {
+ struct bcm2835_desc *d = c->desc;
+ dma_addr_t pos;
+
+ if (d->dir == DMA_MEM_TO_DEV)
+ pos = readl(c->dma_chan_base + BCM2835_DMA_SOURCE_AD);
+ else if (d->dir == DMA_DEV_TO_MEM)
+ pos = readl(c->dma_chan_base + BCM2835_DMA_DEST_AD);
+ else
+ pos = 0;
+
+ txstate->residue = bcm2835_dma_desc_size_pos(d, pos);
+ } else {
+ txstate->residue = 0;
+ }
+
+ spin_unlock_irqrestore(&c->vc.lock, flags);
+
+ return ret;
+}
+
+static void bcm2835_dma_issue_pending(struct dma_chan *chan)
+{
+ struct bcm2835_chan *c = to_bcm2835_dma_chan(chan);
+ unsigned long flags;
+
+ c->cyclic = true; /* nothing else is implemented */
+
+ spin_lock_irqsave(&c->vc.lock, flags);
+ if (vchan_issue_pending(&c->vc) && !c->desc)
+ bcm2835_dma_start_desc(c);
+
+ spin_unlock_irqrestore(&c->vc.lock, flags);
+}
+
+
+static struct dma_async_tx_descriptor *bcm2835_dma_prep_dma_cyclic(
+ struct dma_chan *chan, dma_addr_t buf_addr, size_t buf_len,
+ size_t period_len, enum dma_transfer_direction direction,
+ unsigned long flags, void *context)
+{
+ struct bcm2835_chan *c = to_bcm2835_dma_chan(chan);
+ enum dma_slave_buswidth dev_width;
+ struct bcm2835_desc *d;
+ dma_addr_t dev_addr;
+ unsigned es, sync_type;
+ unsigned frame;
+
+ /* Grab configuration */
+ if (direction == DMA_DEV_TO_MEM) {
+ dev_addr = c->cfg.src_addr;
+ dev_width = c->cfg.src_addr_width;
+ sync_type = BCM2835_DMA_S_DREQ;
+ } else if (direction == DMA_MEM_TO_DEV) {
+ dev_addr = c->cfg.dst_addr;
+ dev_width = c->cfg.dst_addr_width;
+ sync_type = BCM2835_DMA_D_DREQ;
+ } else {
+ dev_err(chan->device->dev, "%s: bad direction?\n", __func__);
+ return NULL;
+ }
+
+ /* Bus width translates to the element size (ES) */
+ switch (dev_width) {
+ case DMA_SLAVE_BUSWIDTH_4_BYTES:
+ es = BCM2835_DMA_DATA_TYPE_S32;
+ break;
+ default:
+ return NULL;
+ }
+
+ /* Now allocate and setup the descriptor. */
+ d = kzalloc(sizeof(*d), GFP_NOWAIT);
+ if (!d)
+ return NULL;
+
+ d->dir = direction;
+ d->frames = buf_len / period_len;
+
+ /* Allocate memory for control blocks */
+ d->control_block_size = d->frames * sizeof(struct bcm2835_dma_cb);
+ d->control_block_base = dma_alloc_coherent(chan->device->dev,
+ d->control_block_size, &d->control_block_base_phys,
+ GFP_NOWAIT);
+
+ if (!d->control_block_base) {
+ kfree(d);
+ dev_err(chan->device->dev,
+ "%s: Memory allocation error\n", __func__);
+ return NULL;
+ }
+
+ memset(d->control_block_base, 0, d->control_block_size);
+
+ /*
+ * Iterate over all frames, create a control block
+ * for each frame and link them together.
+ */
+ for (frame = 0; frame < d->frames; frame++) {
+ struct bcm2835_dma_cb *control_block =
+ &d->control_block_base[frame];
+
+ /* Setup adresses */
+ if (d->dir == DMA_DEV_TO_MEM) {
+ control_block->info = BCM2835_DMA_D_INC;
+ control_block->src = dev_addr;
+ control_block->dst = buf_addr + frame * period_len;
+ } else {
+ control_block->info = BCM2835_DMA_S_INC;
+ control_block->src = buf_addr + frame * period_len;
+ control_block->dst = dev_addr;
+ }
+
+ /* Enable interrupt */
+ control_block->info |= BCM2835_DMA_INT_EN;
+
+ /* Setup synchronization */
+ if (sync_type != 0)
+ control_block->info |= sync_type;
+
+ /* Setup DREQ channel */
+ if (c->dreq != 0)
+ control_block->info |=
+ BCM2835_DMA_PER_MAP(c->dreq);
+
+ /* Length of a frame */
+ control_block->length = period_len;
+ d->size += control_block->length;
+
+ /*
+ * Next block is the next frame.
+ * This DMA engine driver currently only supports cyclic DMA.
+ * Therefore, wrap around at number of frames.
+ */
+ control_block->next = d->control_block_base_phys +
+ sizeof(struct bcm2835_dma_cb)
+ * ((frame + 1) % d->frames);
+
+ /* The following fields are not used here */
+ control_block->stride = 0;
+ control_block->pad[0] = 0;
+ control_block->pad[1] = 0;
+ }
+
+ return vchan_tx_prep(&c->vc, &d->vd, flags);
+}
+
+static int bcm2835_dma_slave_config(struct bcm2835_chan *c,
+ struct dma_slave_config *cfg)
+{
+ if ((cfg->direction == DMA_DEV_TO_MEM &&
+ cfg->src_addr_width != DMA_SLAVE_BUSWIDTH_4_BYTES) ||
+ (cfg->direction == DMA_MEM_TO_DEV &&
+ cfg->dst_addr_width != DMA_SLAVE_BUSWIDTH_4_BYTES) ||
+ (cfg->direction != DMA_DEV_TO_MEM &&
+ cfg->direction != DMA_MEM_TO_DEV)) {
+ return -EINVAL;
+ }
+
+ c->cfg = *cfg;
+
+ return 0;
+}
+
+static int bcm2835_dma_terminate_all(struct bcm2835_chan *c)
+{
+ struct bcm2835_dmadev *d = to_bcm2835_dma_dev(c->vc.chan.device);
+ unsigned long flags;
+ int timeout = 1000;
+ LIST_HEAD(head);
+
+ spin_lock_irqsave(&c->vc.lock, flags);
+
+ /* Prevent this channel being scheduled */
+ spin_lock(&d->lock);
+ list_del_init(&c->node);
+ spin_unlock(&d->lock);
+
+ /*
+ * Stop DMA activity: we assume the callback will not be called
+ * after bcm_dma_abort() returns (even if it does, it will see
+ * c->desc is NULL and exit.)
+ */
+ if (c->desc) {
+ c->desc = NULL;
+ bcm2835_dma_abort(c->dma_chan_base);
+
+ /* Wait for stopping */
+ while (timeout > 0) {
+ timeout--;
+ if (!(readl(c->dma_chan_base + BCM2835_DMA_CS) &
+ BCM2835_DMA_ACTIVE))
+ break;
+
+ cpu_relax();
+ }
+
+ if (timeout <= 0)
+ dev_err(d->ddev.dev, "DMA transfer could not be terminated\n");
+ }
+
+ vchan_get_all_descriptors(&c->vc, &head);
+ spin_unlock_irqrestore(&c->vc.lock, flags);
+ vchan_dma_desc_free_list(&c->vc, &head);
+
+ return 0;
+}
+
+static int bcm2835_dma_control(struct dma_chan *chan, enum dma_ctrl_cmd cmd,
+ unsigned long arg)
+{
+ struct bcm2835_chan *c = to_bcm2835_dma_chan(chan);
+ int ret;
+
+ switch (cmd) {
+ case DMA_SLAVE_CONFIG:
+ return bcm2835_dma_slave_config(c,
+ (struct dma_slave_config *)arg);
+
+ case DMA_TERMINATE_ALL:
+ bcm2835_dma_terminate_all(c);
+ break;
+
+ default:
+ ret = -ENXIO;
+ break;
+ }
+
+ return ret;
+}
+
+static int bcm2835_dma_chan_init(struct bcm2835_dmadev *d, int chan_id, int irq)
+{
+ struct bcm2835_chan *c;
+
+ c = kzalloc(sizeof(*c), GFP_KERNEL);
+ if (!c)
+ return -ENOMEM;
+
+ c->vc.desc_free = bcm2835_dma_desc_free;
+ vchan_init(&c->vc, &d->ddev);
+ INIT_LIST_HEAD(&c->node);
+
+ d->ddev.chancnt++;
+
+ c->dma_chan_base = BCM2835_DMA_CHANIO(d->dma_base, chan_id);
+ c->dma_ch = chan_id;
+ c->dma_irq_number = irq;
+
+ return 0;
+}
+
+static void bcm2835_dma_free(struct bcm2835_dmadev *od)
+{
+ while (!list_empty(&od->ddev.channels)) {
+ struct bcm2835_chan *c = list_first_entry(&od->ddev.channels,
+ struct bcm2835_chan, vc.chan.device_node);
+
+ list_del(&c->vc.chan.device_node);
+ tasklet_kill(&c->vc.task);
+ kfree(c);
+ }
+}
+
+#if defined(CONFIG_OF)
+static const struct of_device_id bcm2835_dma_of_match[] = {
+ { .compatible = "brcm,bcm2835-dma", },
+ {},
+};
+MODULE_DEVICE_TABLE(of, bcm2835_dma_of_match);
+