linux.kernel - 26 new messages in 20 topics - digest

linux.kernel
http://groups.google.com/group/linux.kernel?hl=en

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Today's topics:

* sched: bias to target cpu load to reduce task moving - 1 messages, 1 author
http://groups.google.com/group/linux.kernel/t/f741f1f80f810843?hl=en
* Small fixes to memblock and nobootmem - 2 messages, 2 authors
http://groups.google.com/group/linux.kernel/t/53662ae043b7db01?hl=en
* dma-debug: enhance dma_debug_device_change() to check for mapping errors - 1
messages, 1 author
http://groups.google.com/group/linux.kernel/t/9225e1a50c795de9?hl=en
* netfilter: nf_conntrack: fix RCU race in nf_conntrack_find_get - 1 messages,
1 author
http://groups.google.com/group/linux.kernel/t/1f5bd631cfffab0f?hl=en
* dmaengine: Add support for BCM2835 - 2 messages, 2 authors
http://groups.google.com/group/linux.kernel/t/7dbc38b06cb5d064?hl=en
* x86: Add Intel graphics stolen memory quirk for gen2 platforms - 1 messages,
1 author
http://groups.google.com/group/linux.kernel/t/2caefa06ab54c9c1?hl=en
* 3.10.26-stable review - 1 messages, 1 author
http://groups.google.com/group/linux.kernel/t/0449b5a1e27f3cb7?hl=en
* usb:hub set hub->change_bits when over-current happens - 1 messages, 1
author
http://groups.google.com/group/linux.kernel/t/b3a0734ad6d093ce?hl=en
* mm: create generic early_ioremap() support - 1 messages, 1 author
http://groups.google.com/group/linux.kernel/t/bd9128f4c741bea4?hl=en
* pull request: bluetooth-next 2014-01-07 - 1 messages, 1 author
http://groups.google.com/group/linux.kernel/t/8789450321247c16?hl=en
* xen-netback: Handle guests with too many frags - 1 messages, 1 author
http://groups.google.com/group/linux.kernel/t/5507fc94be7f133f?hl=en
* iommu/vt-d: mark internal functions as static - 1 messages, 1 author
http://groups.google.com/group/linux.kernel/t/779b56bb501a9e2e?hl=en
* 3.4.76-stable review - 1 messages, 1 author
http://groups.google.com/group/linux.kernel/t/54f42078f0750e24?hl=en
* hwmon/sensors: fix SENSORS_LM75 dependencies - 1 messages, 1 author
http://groups.google.com/group/linux.kernel/t/0b19a469dc611e35?hl=en
* sched: CPU topology try - 1 messages, 1 author
http://groups.google.com/group/linux.kernel/t/c41eda64a33b68cb?hl=en
* usb/core: fix NULL pointer dereference in recursively_mark_NOTATTACHED - 1
messages, 1 author
http://groups.google.com/group/linux.kernel/t/40ce17b146f80934?hl=en
* ASoC: ux500_pcm: Extend Device Tree support to deal with DMA data - 5
messages, 1 author
http://groups.google.com/group/linux.kernel/t/12c5951118390658?hl=en
* Implement new PTRACE_EVENT_SYSCALL_{ENTER,EXIT} - 1 messages, 1 author
http://groups.google.com/group/linux.kernel/t/b5d27cb9eafa4d04?hl=en
* [PATCH] tracing: Show available event triggers when no trigger is set - 1
messages, 1 author
http://groups.google.com/group/linux.kernel/t/44727c0d1226d1a4?hl=en
* vb2: Check if there are buffers before streamon - 1 messages, 1 author
http://groups.google.com/group/linux.kernel/t/257ee1585451b40f?hl=en

==============================================================================
TOPIC: sched: bias to target cpu load to reduce task moving
http://groups.google.com/group/linux.kernel/t/f741f1f80f810843?hl=en
==============================================================================

== 1 of 1 ==
Date: Tues, Jan 7 2014 7:20 am
From: Morten Rasmussen


On Tue, Jan 07, 2014 at 01:15:23PM +0000, Peter Zijlstra wrote:
> On Tue, Jan 07, 2014 at 01:59:30PM +0100, Peter Zijlstra wrote:
> > On Tue, Jan 07, 2014 at 12:55:18PM +0000, Morten Rasmussen wrote:
> > > My understanding is that should_we_balance() decides which cpu is
> > > eligible for doing the load balancing for a given domain (and the
> > > domains above). That is, only one cpu in a group is allowed to load
> > > balance between the local group and other groups. That cpu would
> > > therefore be reponsible for pulling enough load that the groups are
> > > balanced even if it means temporarily overloading itself. The other cpus
> > > in the group will take care of load balancing the extra load within the
> > > local group later.
> >
> > Correct.
>
> On that; one of the things I wanted to (and previously did attempt but
> failed) is trying to rotate this cpu. Currently its always the first cpu
> (of the group) and that gives a noticeable bias.
>
> If we could slowly rotate the cpu that does this that would alleviate
> both the load and cost bias.

From a load perspective wouldn't it be better to pick the least loaded
cpu in the group? It is not cheap to implement, but in theory it should
give less balancing within the group later an less unfairness until it
happens.

Rotating the cpu is probably good enough for most cases and certainly
easier to implement.

>
> One thing I was thinking of is keeping a global counter maybe:
> 'x := jiffies >> n'
> might be good enough and using the 'x % nr_cpus_in_group'-th cpu
> instead.
>
> Then again, these are micro issue and not a lot of people complain
> about this.

The bias continues after they first round of load balance by the other
cpus?

Pulling everything to one cpu is not ideal from a performance point of
view. You loose some available cpu cycles until the balance settles.
However, it is not easy to do better and maintain scalability at the
same time.
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==============================================================================
TOPIC: Small fixes to memblock and nobootmem
http://groups.google.com/group/linux.kernel/t/53662ae043b7db01?hl=en
==============================================================================

== 1 of 2 ==
Date: Tues, Jan 7 2014 7:20 am
From: Philipp Hachtmann


While working on the conversion of the s390 port to use memblock and
nobootmem instead of bootmem I discovered two small bugs:

alloc_memory_core_early() in mm/nobootmem.c called memblock_reserve()
without forwarding the return value of memblock_reserve().

free_low_memory_core() (used by free_all_bootmem) in mm/nobootmem.c
already took care of releasing the memblock.reserved array in case
it has been allocated using memblock itself. This behaviour was
missing for memblock.memory.
Cases where memblock.memory grows bigger than the initial 128 entries
have been seen. So this should be supported as well.

Philipp Hachtmann (2):
mm, nobootmem: Add return value check in __alloc_memory_core_early()
mm: free memblock.memory in free_all_bootmem

include/linux/memblock.h | 1 +
mm/memblock.c | 12 ++++++++++++
mm/nobootmem.c | 11 +++++++++--
3 files changed, 22 insertions(+), 2 deletions(-)

--
1.8.4.5

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== 2 of 2 ==
Date: Tues, Jan 7 2014 7:30 am
From: Tejun Heo


On Tue, Jan 07, 2014 at 04:16:14PM +0100, Philipp Hachtmann wrote:
> When calling free_all_bootmem() the free areas under memblock's
> control are released to the buddy allocator. Additionally the
> reserved list is freed if it was reallocated by memblock.
> The same should apply for the memory list.
>
> Signed-off-by: Philipp Hachtmann <phacht@linux.vnet.ibm.com>

Reviewed-by: Tejun Heo <tj@kernel.org>

Thanks.

--
tejun
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==============================================================================
TOPIC: dma-debug: enhance dma_debug_device_change() to check for mapping
errors
http://groups.google.com/group/linux.kernel/t/9225e1a50c795de9?hl=en
==============================================================================

== 1 of 1 ==
Date: Tues, Jan 7 2014 7:20 am
From: Joerg Roedel


On Tue, Jan 07, 2014 at 08:00:33AM -0700, Shuah Khan wrote:
> This patch and a follow-on cocinelli warning fix patch are in
> linux-next. Would you like me to send a patch relative to the change
> in linux-next or cut a new patch against the latest Linus's git. I
> can go either way. We just have to remember to drop those two
> patches from linux-next.

Please do a patch against linus.git and drop the two patches from
linux-next. Over which tree did they go into linux-next anyway?


Joerg


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==============================================================================
TOPIC: netfilter: nf_conntrack: fix RCU race in nf_conntrack_find_get
http://groups.google.com/group/linux.kernel/t/1f5bd631cfffab0f?hl=en
==============================================================================

== 1 of 1 ==
Date: Tues, Jan 7 2014 7:30 am
From: Florian Westphal


Eric Dumazet <eric.dumazet@gmail.com> wrote:
> > diff --git a/net/netfilter/nf_conntrack_core.c b/net/netfilter/nf_conntrack_core.c
> > index 43549eb..7a34bb2 100644
> > --- a/net/netfilter/nf_conntrack_core.c
> > +++ b/net/netfilter/nf_conntrack_core.c
> > @@ -387,8 +387,12 @@ begin:
> > !atomic_inc_not_zero(&ct->ct_general.use)))
> > h = NULL;
> > else {
> > + /* A conntrack can be recreated with the equal tuple,
> > + * so we need to check that the conntrack is initialized
> > + */
> > if (unlikely(!nf_ct_tuple_equal(tuple, &h->tuple) ||
> > - nf_ct_zone(ct) != zone)) {
> > + nf_ct_zone(ct) != zone) ||
> > + !nf_ct_is_confirmed(ct)) {
> > nf_ct_put(ct);
> > goto begin;
> > }
>
> I do not think this is the right way to fix this problem (if said
> problem is confirmed)
>
> Remember the rule about SLAB_DESTROY_BY_RCU :
>
> When a struct is freed, then reused, its important to set the its refcnt
> (from 0 to 1) only when the structure is fully ready for use.
>
> If a lookup finds a structure which is not yet setup, the
> atomic_inc_not_zero() will fail.

Indeed. But, the structure itself might be ready (or rather,
can be ready since the allocation side will set the refcount to one
after doing the initial work, such as zapping old ->status flags and
setting tuple information).

The problem is with nat extension area stored in the ct->ext area.
This extension area is preallocated but the snat/dnat action
information is only set up after the ct (or rather, the skb that grabbed
a reference to the nf_conn entry) traverses nat pre/postrouting.

This will also set up a null-binding when no matching SNAT/DNAT/MASQERUADE
rule existed.

The manipulations of the skb->nfct->ext nat area are performed without
a lock. Concurrent access is supposedly impossible as the conntrack
should not (yet) be in the hash table.

The confirmed bit is set right before we insert the conntrack into
the hash table (after we traversed rules, ct is ready to be
'published').

i.e. when the confirmed bit is NOT set we should not be 'seeing' the nf_conn
struct when we perform the lookup, as it should still be sitting on the
'unconfirmed' list, being invisible to readers.

Does that explanation make sense to you?

Thanks for looking into this.
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==============================================================================
TOPIC: dmaengine: Add support for BCM2835
http://groups.google.com/group/linux.kernel/t/7dbc38b06cb5d064?hl=en
==============================================================================

== 1 of 2 ==
Date: Tues, Jan 7 2014 7:30 am
From: Andy Shevchenko


On Mon, 2014-01-06 at 20:18 +0100, Florian Meier wrote:
> Add support for DMA controller of BCM2835 as used in the Raspberry Pi.
> Currently it only supports cyclic DMA.
>
> Signed-off-by: Florian Meier <florian.meier@koalo.de>
> ---
>
> Merging and rebasing was easier than I feared and
> I found an additional API change (DMA_SUCCESS).
>
> Andy: I would be happy to have your Reviewed-by again,
> but I removed it because of these changes.

Sure. Couple of minor comments below, anyway still seems okay for me:

Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>

>
> Changes compared to v9:
> - Added commas to device tree documentation
> - DMA_SUCCESS -> DMA_COMPLETE
> - Removed #if defined(CONFIG_OF)
> - Use of dma_get_any_slave_channel
> - Use of dma_set_mask_and_coherent
> - Removed if (pdev->dev.of_node) in probe
>
> .../devicetree/bindings/dma/bcm2835-dma.txt | 57 ++
> drivers/dma/Kconfig | 6 +
> drivers/dma/Makefile | 1 +
> drivers/dma/bcm2835-dma.c | 706 +++++++++++++++++++++
> 4 files changed, 770 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/dma/bcm2835-dma.txt
> create mode 100644 drivers/dma/bcm2835-dma.c
>
> diff --git a/Documentation/devicetree/bindings/dma/bcm2835-dma.txt b/Documentation/devicetree/bindings/dma/bcm2835-dma.txt
> new file mode 100644
> index 0000000..1396078
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/dma/bcm2835-dma.txt
> @@ -0,0 +1,57 @@
> +* BCM2835 DMA controller
> +
> +The BCM2835 DMA controller has 16 channels in total.
> +Only the lower 13 channels have an associated IRQ.
> +Some arbitrary channels are used by the firmware
> +(1,3,6,7 in the current firmware version).
> +The channels 0,2 and 3 have special functionality
> +and should not be used by the driver.
> +
> +Required properties:
> +- compatible: Should be "brcm,bcm2835-dma".
> +- reg: Should contain DMA registers location and length.
> +- interrupts: Should contain the DMA interrupts associated
> + to the DMA channels in ascending order.
> +- #dma-cells: Must be <1>, the cell in the dmas property of the
> + client device represents the DREQ number.
> +- brcm,dma-channel-mask: Bit mask representing the channels
> + not used by the firmware in ascending order,
> + i.e. first channel corresponds to LSB.
> +
> +Example:
> +
> +dma: dma@7e007000 {
> + compatible = "brcm,bcm2835-dma";
> + reg = <0x7e007000 0xf00>;
> + interrupts = <1 16>,
> + <1 17>,
> + <1 18>,
> + <1 19>,
> + <1 20>,
> + <1 21>,
> + <1 22>,
> + <1 23>,
> + <1 24>,
> + <1 25>,
> + <1 26>,
> + <1 27>,
> + <1 28>;
> +
> + #dma-cells = <1>;
> + brcm,dma-channel-mask = <0x7f35>;
> +};
> +
> +DMA clients connected to the BCM2835 DMA controller must use the format
> +described in the dma.txt file, using a two-cell specifier for each channel.
> +
> +Example:
> +
> +bcm2835_i2s: i2s@7e203000 {
> + compatible = "brcm,bcm2835-i2s";
> + reg = < 0x7e203000 0x20>,
> + < 0x7e101098 0x02>;
> +
> + dmas = <&dma 2>,
> + <&dma 3>;
> + dma-names = "tx", "rx";
> +};
> diff --git a/drivers/dma/Kconfig b/drivers/dma/Kconfig
> index c823daa..6f74f8c 100644
> --- a/drivers/dma/Kconfig
> +++ b/drivers/dma/Kconfig
> @@ -304,6 +304,12 @@ config DMA_OMAP
> select DMA_ENGINE
> select DMA_VIRTUAL_CHANNELS
>
> +config DMA_BCM2835
> + tristate "BCM2835 DMA engine support"
> + depends on (ARCH_BCM2835 || MACH_BCM2708)
> + select DMA_ENGINE
> + select DMA_VIRTUAL_CHANNELS
> +
> config TI_CPPI41
> tristate "AM33xx CPPI41 DMA support"
> depends on ARCH_OMAP
> diff --git a/drivers/dma/Makefile b/drivers/dma/Makefile
> index 0ce2da9..0a6f08e 100644
> --- a/drivers/dma/Makefile
> +++ b/drivers/dma/Makefile
> @@ -38,6 +38,7 @@ obj-$(CONFIG_EP93XX_DMA) += ep93xx_dma.o
> obj-$(CONFIG_DMA_SA11X0) += sa11x0-dma.o
> obj-$(CONFIG_MMP_TDMA) += mmp_tdma.o
> obj-$(CONFIG_DMA_OMAP) += omap-dma.o
> +obj-$(CONFIG_DMA_BCM2835) += bcm2835-dma.o
> obj-$(CONFIG_MMP_PDMA) += mmp_pdma.o
> obj-$(CONFIG_DMA_JZ4740) += dma-jz4740.o
> obj-$(CONFIG_TI_CPPI41) += cppi41.o
> diff --git a/drivers/dma/bcm2835-dma.c b/drivers/dma/bcm2835-dma.c
> new file mode 100644
> index 0000000..6ae0708
> --- /dev/null
> +++ b/drivers/dma/bcm2835-dma.c
> @@ -0,0 +1,706 @@
> +/*
> + * BCM2835 DMA engine support
> + *
> + * This driver only supports cyclic DMA transfers
> + * as needed for the I2S module.
> + *
> + * Author: Florian Meier <florian.meier@koalo.de>
> + * Copyright 2013
> + *
> + * Based on
> + * OMAP DMAengine support by Russell King
> + *
> + * BCM2708 DMA Driver
> + * Copyright (C) 2010 Broadcom
> + *
> + * Raspberry Pi PCM I2S ALSA Driver
> + * Copyright (c) by Phil Poole 2013
> + *
> + * MARVELL MMP Peripheral DMA Driver
> + * Copyright 2012 Marvell International Ltd.
> + *
> + * This program is free software; you can redistribute it and/or modify
> + * it under the terms of the GNU General Public License as published by
> + * the Free Software Foundation; either version 2 of the License, or
> + * (at your option) any later version.
> + *
> + * This program is distributed in the hope that it will be useful,
> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
> + * GNU General Public License for more details.
> + */
> +#include <linux/dmaengine.h>
> +#include <linux/dma-mapping.h>
> +#include <linux/err.h>
> +#include <linux/init.h>
> +#include <linux/interrupt.h>
> +#include <linux/list.h>
> +#include <linux/module.h>
> +#include <linux/platform_device.h>
> +#include <linux/slab.h>
> +#include <linux/io.h>
> +#include <linux/spinlock.h>
> +#include <linux/of.h>
> +#include <linux/of_dma.h>
> +
> +#include "virt-dma.h"
> +
> +struct bcm2835_dmadev {
> + struct dma_device ddev;
> + spinlock_t lock;
> + void __iomem *base;
> + struct device_dma_parameters dma_parms;
> +};
> +
> +struct bcm2835_dma_cb {
> + uint32_t info;
> + uint32_t src;
> + uint32_t dst;
> + uint32_t length;
> + uint32_t stride;
> + uint32_t next;
> + uint32_t pad[2];
> +};
> +
> +struct bcm2835_chan {
> + struct virt_dma_chan vc;
> + struct list_head node;
> +
> + struct dma_slave_config cfg;
> + bool cyclic;
> + unsigned int dreq;
> +
> + int ch;
> + struct bcm2835_desc *desc;
> +
> + void __iomem *chan_base;
> + int irq_number;
> +};
> +
> +struct bcm2835_desc {
> + struct virt_dma_desc vd;
> + enum dma_transfer_direction dir;
> +
> + unsigned int control_block_size;
> + struct bcm2835_dma_cb *control_block_base;
> + dma_addr_t control_block_base_phys;
> +
> + unsigned int frames;
> + size_t size;
> +};
> +
> +#define BCM2835_DMA_CS 0x00
> +#define BCM2835_DMA_ADDR 0x04
> +#define BCM2835_DMA_SOURCE_AD 0x0c
> +#define BCM2835_DMA_DEST_AD 0x10
> +#define BCM2835_DMA_NEXTCB 0x1C
> +
> +/* DMA CS Control and Status bits */
> +#define BCM2835_DMA_ACTIVE BIT(0)
> +#define BCM2835_DMA_INT BIT(2)
> +#define BCM2835_DMA_ISPAUSED BIT(4) /* Pause requested or not active */
> +#define BCM2835_DMA_ISHELD BIT(5) /* Is held by DREQ flow control */
> +#define BCM2835_DMA_ERR BIT(8)
> +#define BCM2835_DMA_ABORT BIT(30) /* Stop current CB, go to next, WO */
> +#define BCM2835_DMA_RESET BIT(31) /* WO, self clearing */
> +
> +#define BCM2835_DMA_INT_EN BIT(0)
> +#define BCM2835_DMA_D_INC BIT(4)
> +#define BCM2835_DMA_D_DREQ BIT(6)
> +#define BCM2835_DMA_S_INC BIT(8)
> +#define BCM2835_DMA_S_DREQ BIT(10)
> +
> +#define BCM2835_DMA_PER_MAP(x) ((x) << 16)
> +
> +#define BCM2835_DMA_DATA_TYPE_S8 1
> +#define BCM2835_DMA_DATA_TYPE_S16 2
> +#define BCM2835_DMA_DATA_TYPE_S32 4
> +#define BCM2835_DMA_DATA_TYPE_S128 16
> +
> +#define BCM2835_DMA_BULK_MASK BIT(0)
> +#define BCM2835_DMA_FIQ_MASK (BIT(2) | BIT(3))
> +
> +/* Valid only for channels 0 - 14, 15 has its own base address */
> +#define BCM2835_DMA_CHAN(n) ((n) << 8) /* Base address */
> +#define BCM2835_DMA_CHANIO(base, n) ((base) + BCM2835_DMA_CHAN(n))
> +
> +static inline struct bcm2835_dmadev *to_bcm2835_dma_dev(struct dma_device *d)
> +{
> + return container_of(d, struct bcm2835_dmadev, ddev);
> +}
> +
> +static inline struct bcm2835_chan *to_bcm2835_dma_chan(struct dma_chan *c)
> +{
> + return container_of(c, struct bcm2835_chan, vc.chan);
> +}
> +
> +static inline struct bcm2835_desc *to_bcm2835_dma_desc(
> + struct dma_async_tx_descriptor *t)
> +{
> + return container_of(t, struct bcm2835_desc, vd.tx);
> +}
> +
> +static void bcm2835_dma_desc_free(struct virt_dma_desc *vd)
> +{
> + struct bcm2835_desc *desc = container_of(vd, struct bcm2835_desc, vd);
> + dma_free_coherent(desc->vd.tx.chan->device->dev,
> + desc->control_block_size,
> + desc->control_block_base,
> + desc->control_block_base_phys);
> + kfree(desc);
> +}
> +
> +static int bcm2835_dma_abort(void __iomem *chan_base)
> +{
> + unsigned long cs;
> + long int timeout = 10000;
> +
> + cs = readl(chan_base + BCM2835_DMA_CS);
> + if (!(cs & BCM2835_DMA_ACTIVE))
> + return 0;
> +
> + /* Write 0 to the active bit - Pause the DMA */
> + writel(0, chan_base + BCM2835_DMA_CS);
> +
> + /* Wait for any current AXI transfer to complete */
> + while ((cs & BCM2835_DMA_ISPAUSED) && --timeout) {
> + cpu_relax();
> + cs = readl(chan_base + BCM2835_DMA_CS);
> + }
> +
> + /* We'll un-pause when we set of our next DMA */
> + if (!timeout)
> + return -ETIMEDOUT;
> +
> + if (!(cs & BCM2835_DMA_ACTIVE))
> + return 0;
> +
> + /* Terminate the control block chain */
> + writel(0, chan_base + BCM2835_DMA_NEXTCB);
> +
> + /* Abort the whole DMA */
> + writel(BCM2835_DMA_ABORT | BCM2835_DMA_ACTIVE,
> + chan_base + BCM2835_DMA_CS);
> +
> + return 0;
> +}
> +
> +static void bcm2835_dma_start_desc(struct bcm2835_chan *c)
> +{
> + struct virt_dma_desc *vd = vchan_next_desc(&c->vc);
> + struct bcm2835_desc *d;
> +
> + if (!vd) {
> + c->desc = NULL;
> + return;
> + }
> +
> + list_del(&vd->node);
> +
> + c->desc = d = to_bcm2835_dma_desc(&vd->tx);
> +
> + writel(d->control_block_base_phys, c->chan_base + BCM2835_DMA_ADDR);
> + writel(BCM2835_DMA_ACTIVE, c->chan_base + BCM2835_DMA_CS);
> +}
> +
> +static irqreturn_t bcm2835_dma_callback(int irq, void *data)
> +{
> + struct bcm2835_chan *c = data;
> + struct bcm2835_desc *d;
> + unsigned long flags;
> +
> + spin_lock_irqsave(&c->vc.lock, flags);
> +
> + /* Acknowledge interrupt */
> + writel(BCM2835_DMA_INT, c->chan_base + BCM2835_DMA_CS);
> +
> + d = c->desc;
> +
> + if (d) {
> + /* TODO Only works for cyclic DMA */
> + vchan_cyclic_callback(&d->vd);
> + }
> +
> + /* Keep the DMA engine running */
> + writel(BCM2835_DMA_ACTIVE, c->chan_base + BCM2835_DMA_CS);
> +
> + spin_unlock_irqrestore(&c->vc.lock, flags);
> +
> + return IRQ_HANDLED;
> +}
> +
> +static int bcm2835_dma_alloc_chan_resources(struct dma_chan *chan)
> +{
> + struct bcm2835_chan *c = to_bcm2835_dma_chan(chan);
> +
> + dev_dbg(c->vc.chan.device->dev,
> + "Allocating DMA channel %d\n", c->ch);
> +
> + return request_irq(c->irq_number,
> + bcm2835_dma_callback, 0, "DMA IRQ", c);
> +}
> +
> +static void bcm2835_dma_free_chan_resources(struct dma_chan *chan)
> +{
> + struct bcm2835_chan *c = to_bcm2835_dma_chan(chan);
> +
> + vchan_free_chan_resources(&c->vc);
> + free_irq(c->irq_number, c);
> +
> + dev_dbg(c->vc.chan.device->dev, "Freeing DMA channel %u\n", c->ch);
> +}
> +
> +static size_t bcm2835_dma_desc_size(struct bcm2835_desc *d)
> +{
> + return d->size;
> +}
> +
> +static size_t bcm2835_dma_desc_size_pos(struct bcm2835_desc *d, dma_addr_t addr)
> +{
> + unsigned int i;
> + size_t size;
> +
> + for (size = i = 0; i < d->frames; i++) {
> + struct bcm2835_dma_cb *control_block =
> + &d->control_block_base[i];
> + size_t this_size = control_block->length;
> + dma_addr_t dma;
> +
> + if (d->dir == DMA_DEV_TO_MEM)
> + dma = control_block->dst;
> + else
> + dma = control_block->src;
> +
> + if (size)
> + size += this_size;
> + else if (addr >= dma && addr < dma + this_size)
> + size += dma + this_size - addr;
> + }
> +
> + return size;
> +}
> +
> +static enum dma_status bcm2835_dma_tx_status(struct dma_chan *chan,
> + dma_cookie_t cookie, struct dma_tx_state *txstate)
> +{
> + struct bcm2835_chan *c = to_bcm2835_dma_chan(chan);
> + struct virt_dma_desc *vd;
> + enum dma_status ret;
> + unsigned long flags;
> +
> + ret = dma_cookie_status(chan, cookie, txstate);
> + if (ret == DMA_COMPLETE || !txstate)
> + return ret;
> +
> + spin_lock_irqsave(&c->vc.lock, flags);
> + vd = vchan_find_desc(&c->vc, cookie);
> + if (vd) {
> + txstate->residue =
> + bcm2835_dma_desc_size(to_bcm2835_dma_desc(&vd->tx));
> + } else if (c->desc && c->desc->vd.tx.cookie == cookie) {
> + struct bcm2835_desc *d = c->desc;
> + dma_addr_t pos;
> +
> + if (d->dir == DMA_MEM_TO_DEV)
> + pos = readl(c->chan_base + BCM2835_DMA_SOURCE_AD);
> + else if (d->dir == DMA_DEV_TO_MEM)
> + pos = readl(c->chan_base + BCM2835_DMA_DEST_AD);
> + else
> + pos = 0;
> +
> + txstate->residue = bcm2835_dma_desc_size_pos(d, pos);
> + } else {
> + txstate->residue = 0;
> + }
> +
> + spin_unlock_irqrestore(&c->vc.lock, flags);
> +
> + return ret;
> +}
> +
> +static void bcm2835_dma_issue_pending(struct dma_chan *chan)
> +{
> + struct bcm2835_chan *c = to_bcm2835_dma_chan(chan);
> + unsigned long flags;
> +
> + c->cyclic = true; /* Nothing else is implemented */
> +
> + spin_lock_irqsave(&c->vc.lock, flags);
> + if (vchan_issue_pending(&c->vc) && !c->desc)
> + bcm2835_dma_start_desc(c);
> +
> + spin_unlock_irqrestore(&c->vc.lock, flags);
> +}
> +
> +static struct dma_async_tx_descriptor *bcm2835_dma_prep_dma_cyclic(
> + struct dma_chan *chan, dma_addr_t buf_addr, size_t buf_len,
> + size_t period_len, enum dma_transfer_direction direction,
> + unsigned long flags, void *context)
> +{
> + struct bcm2835_chan *c = to_bcm2835_dma_chan(chan);
> + enum dma_slave_buswidth dev_width;
> + struct bcm2835_desc *d;
> + dma_addr_t dev_addr;
> + unsigned int es, sync_type;
> + unsigned int frame;
> +
> + /* Grab configuration */
> + if (!is_slave_direction(direction)) {
> + dev_err(chan->device->dev, "%s: bad direction?\n", __func__);
> + return NULL;
> + }
> +
> + if (direction == DMA_DEV_TO_MEM) {
> + dev_addr = c->cfg.src_addr;
> + dev_width = c->cfg.src_addr_width;
> + sync_type = BCM2835_DMA_S_DREQ;
> + } else {
> + dev_addr = c->cfg.dst_addr;
> + dev_width = c->cfg.dst_addr_width;
> + sync_type = BCM2835_DMA_D_DREQ;
> + }
> +
> + /* Bus width translates to the element size (ES) */
> + switch (dev_width) {
> + case DMA_SLAVE_BUSWIDTH_4_BYTES:
> + es = BCM2835_DMA_DATA_TYPE_S32;
> + break;
> + default:
> + return NULL;
> + }
> +
> + /* Now allocate and setup the descriptor. */
> + d = kzalloc(sizeof(*d), GFP_NOWAIT);
> + if (!d)
> + return NULL;
> +
> + d->dir = direction;
> + d->frames = buf_len / period_len;
> +
> + /* Allocate memory for control blocks */
> + d->control_block_size = d->frames * sizeof(struct bcm2835_dma_cb);
> + d->control_block_base = dma_zalloc_coherent(chan->device->dev,
> + d->control_block_size, &d->control_block_base_phys,
> + GFP_NOWAIT);
> +
> + if (!d->control_block_base) {
> + kfree(d);
> + return NULL;
> + }
> +
> + /*
> + * Iterate over all frames, create a control block
> + * for each frame and link them together.
> + */
> + for (frame = 0; frame < d->frames; frame++) {
> + struct bcm2835_dma_cb *control_block =
> + &d->control_block_base[frame];
> +
> + /* Setup adresses */
> + if (d->dir == DMA_DEV_TO_MEM) {
> + control_block->info = BCM2835_DMA_D_INC;
> + control_block->src = dev_addr;
> + control_block->dst = buf_addr + frame * period_len;
> + } else {
> + control_block->info = BCM2835_DMA_S_INC;
> + control_block->src = buf_addr + frame * period_len;
> + control_block->dst = dev_addr;
> + }
> +
> + /* Enable interrupt */
> + control_block->info |= BCM2835_DMA_INT_EN;
> +
> + /* Setup synchronization */
> + if (sync_type != 0)
> + control_block->info |= sync_type;
> +
> + /* Setup DREQ channel */
> + if (c->dreq != 0)
> + control_block->info |=
> + BCM2835_DMA_PER_MAP(c->dreq);
> +
> + /* Length of a frame */
> + control_block->length = period_len;
> + d->size += control_block->length;
> +
> + /*
> + * Next block is the next frame.
> + * This DMA engine driver currently only supports cyclic DMA.
> + * Therefore, wrap around at number of frames.
> + */
> + control_block->next = d->control_block_base_phys +
> + sizeof(struct bcm2835_dma_cb)
> + * ((frame + 1) % d->frames);
> + }
> +
> + return vchan_tx_prep(&c->vc, &d->vd, flags);
> +}
> +
> +static int bcm2835_dma_slave_config(struct bcm2835_chan *c,
> + struct dma_slave_config *cfg)
> +{
> + if ((cfg->direction == DMA_DEV_TO_MEM &&
> + cfg->src_addr_width != DMA_SLAVE_BUSWIDTH_4_BYTES) ||
> + (cfg->direction == DMA_MEM_TO_DEV &&
> + cfg->dst_addr_width != DMA_SLAVE_BUSWIDTH_4_BYTES) ||
> + !is_slave_direction(cfg->direction)) {
> + return -EINVAL;
> + }
> +
> + c->cfg = *cfg;
> +
> + return 0;
> +}
> +
> +static int bcm2835_dma_terminate_all(struct bcm2835_chan *c)
> +{
> + struct bcm2835_dmadev *d = to_bcm2835_dma_dev(c->vc.chan.device);
> + unsigned long flags;
> + int timeout = 10000;
> + LIST_HEAD(head);
> +
> + spin_lock_irqsave(&c->vc.lock, flags);
> +
> + /* Prevent this channel being scheduled */
> + spin_lock(&d->lock);
> + list_del_init(&c->node);
> + spin_unlock(&d->lock);
> +
> + /*
> + * Stop DMA activity: we assume the callback will not be called
> + * after bcm_dma_abort() returns (even if it does, it will see
> + * c->desc is NULL and exit.)
> + */
> + if (c->desc) {
> + c->desc = NULL;
> + bcm2835_dma_abort(c->chan_base);
> +
> + /* Wait for stopping */
> + while (--timeout) {
> + if (!(readl(c->chan_base + BCM2835_DMA_CS) &
> + BCM2835_DMA_ACTIVE))
> + break;
> +
> + cpu_relax();
> + }
> +
> + if (!timeout)
> + dev_err(d->ddev.dev, "DMA transfer could not be terminated\n");
> + }
> +
> + vchan_get_all_descriptors(&c->vc, &head);
> + spin_unlock_irqrestore(&c->vc.lock, flags);
> + vchan_dma_desc_free_list(&c->vc, &head);
> +
> + return 0;
> +}
> +
> +static int bcm2835_dma_control(struct dma_chan *chan, enum dma_ctrl_cmd cmd,
> + unsigned long arg)
> +{
> + struct bcm2835_chan *c = to_bcm2835_dma_chan(chan);
> +
> + switch (cmd) {
> + case DMA_SLAVE_CONFIG:
> + return bcm2835_dma_slave_config(c,
> + (struct dma_slave_config *)arg);
> +
> + case DMA_TERMINATE_ALL:
> + return bcm2835_dma_terminate_all(c);
> +
> + default:
> + return -ENXIO;
> + }
> +}
> +
> +static int bcm2835_dma_chan_init(struct bcm2835_dmadev *d, int chan_id, int irq)
> +{
> + struct bcm2835_chan *c;
> +
> + c = devm_kzalloc(d->ddev.dev, sizeof(*c), GFP_KERNEL);
> + if (!c)
> + return -ENOMEM;
> +
> + c->vc.desc_free = bcm2835_dma_desc_free;
> + vchan_init(&c->vc, &d->ddev);
> + INIT_LIST_HEAD(&c->node);
> +
> + d->ddev.chancnt++;
> +
> + c->chan_base = BCM2835_DMA_CHANIO(d->base, chan_id);
> + c->ch = chan_id;
> + c->irq_number = irq;
> +
> + return 0;
> +}
> +
> +static void bcm2835_dma_free(struct bcm2835_dmadev *od)
> +{
> + struct bcm2835_chan *c, *next;
> +
> + list_for_each_entry_safe(c, next, &od->ddev.channels,
> + vc.chan.device_node) {
> + list_del(&c->vc.chan.device_node);
> + tasklet_kill(&c->vc.task);
> + }
> +}
> +
> +static const struct of_device_id bcm2835_dma_of_match[] = {
> + { .compatible = "brcm,bcm2835-dma", },
> + {},
> +};
> +MODULE_DEVICE_TABLE(of, bcm2835_dma_of_match);
> +
> +static struct dma_chan *bcm2835_dma_xlate(struct of_phandle_args *spec,
> + struct of_dma *ofdma)
> +{
> + struct bcm2835_dmadev *d = ofdma->of_dma_data;
> + struct dma_chan *chan;
> +
> + chan = dma_get_any_slave_channel(&d->ddev);
> + if (!chan)
> + return NULL;
> +
> + /* Set DREQ from param */
> + to_bcm2835_dma_chan(chan)->dreq = spec->args[0];
> +
> + return chan;
> +}
> +
> +static int bcm2835_dma_device_slave_caps(struct dma_chan *dchan,
> + struct dma_slave_caps *caps)
> +{
> + caps->src_addr_widths = BIT(DMA_SLAVE_BUSWIDTH_4_BYTES);
> + caps->dstn_addr_widths = BIT(DMA_SLAVE_BUSWIDTH_4_BYTES);
> + caps->directions = BIT(DMA_DEV_TO_MEM) | BIT(DMA_MEM_TO_DEV);
> + caps->cmd_pause = false;
> + caps->cmd_terminate = true;
> +
> + return 0;
> +}
> +
> +static int bcm2835_dma_probe(struct platform_device *pdev)
> +{
> + struct bcm2835_dmadev *od;
> + struct resource *res;
> + void __iomem *base;
> + int rc;
> + int i;
> + int irq;
> + uint32_t chans_available;
> +
> + if (!pdev->dev.dma_mask)
> + pdev->dev.dma_mask = &pdev->dev.coherent_dma_mask;
> +
> + rc = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32));
> + if (rc)
> + return rc;

I'm not sure but you might even use dma_coerce_mask_and_coherent() here.

>
> +
> + od = devm_kzalloc(&pdev->dev, sizeof(*od), GFP_KERNEL);
> + if (!od)
> + return -ENOMEM;
> +
> + pdev->dev.dma_parms = &od->dma_parms;
> + dma_set_max_seg_size(&pdev->dev, 0x3FFFFFFF);
> +
> + res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
> + base = devm_ioremap_resource(&pdev->dev, res);
> + if (IS_ERR(base))
> + return PTR_ERR(base);
> +
> + od->base = base;
> +
> + dma_cap_set(DMA_SLAVE, od->ddev.cap_mask);
> + dma_cap_set(DMA_CYCLIC, od->ddev.cap_mask);
> + od->ddev.device_alloc_chan_resources = bcm2835_dma_alloc_chan_resources;
> + od->ddev.device_free_chan_resources = bcm2835_dma_free_chan_resources;
> + od->ddev.device_tx_status = bcm2835_dma_tx_status;
> + od->ddev.device_issue_pending = bcm2835_dma_issue_pending;
> + od->ddev.device_slave_caps = bcm2835_dma_device_slave_caps;
> + od->ddev.device_prep_dma_cyclic = bcm2835_dma_prep_dma_cyclic;
> + od->ddev.device_control = bcm2835_dma_control;
> + od->ddev.dev = &pdev->dev;
> + INIT_LIST_HEAD(&od->ddev.channels);
> + spin_lock_init(&od->lock);
> +
> + platform_set_drvdata(pdev, od);
> +
> + /* Request DMA channel mask from device tree */
> + if (of_property_read_u32(pdev->dev.of_node,
> + "brcm,dma-channel-mask",
> + &chans_available)) {
> + dev_err(&pdev->dev, "Failed to get channel mask\n");
> + rc = -EINVAL;
> + goto err_no_dma;
> + }
> +
> + /*
> + * Do not use the FIQ and BULK channels,
> + * because they are used by the GPU.

Could a text width be closer to 72-80 characters?

> + */
> + chans_available &= ~(BCM2835_DMA_FIQ_MASK | BCM2835_DMA_BULK_MASK);
> +
> + for (i = 0; i < pdev->num_resources; i++) {
> + irq = platform_get_irq(pdev, i);
> + if (irq < 0)
> + break;
> +
> + if (chans_available & (1 << i)) {
> + rc = bcm2835_dma_chan_init(od, i, irq);
> + if (rc)
> + goto err_no_dma;
> + }
> + }
> +
> + dev_dbg(&pdev->dev, "Initialized %i DMA channels\n", i);
> +
> + /* Device-tree DMA controller registration */
> + rc = of_dma_controller_register(pdev->dev.of_node,
> + bcm2835_dma_xlate, od);
> + if (rc) {
> + dev_err(&pdev->dev, "Failed to register DMA controller\n");
> + goto err_no_dma;
> + }
> +
> + rc = dma_async_device_register(&od->ddev);
> + if (rc) {
> + dev_err(&pdev->dev,
> + "Failed to register slave DMA engine device: %d\n", rc);
> + goto err_no_dma;
> + }
> +
> + dev_dbg(&pdev->dev, "Load BCM2835 DMA engine driver\n");
> +
> + return 0;
> +
> +err_no_dma:
> + bcm2835_dma_free(od);
> + return rc;
> +}
> +
> +static int bcm2835_dma_remove(struct platform_device *pdev)
> +{
> + struct bcm2835_dmadev *od = platform_get_drvdata(pdev);
> +
> + dma_async_device_unregister(&od->ddev);
> + bcm2835_dma_free(od);
> +
> + return 0;
> +}
> +
> +static struct platform_driver bcm2835_dma_driver = {
> + .probe = bcm2835_dma_probe,
> + .remove = bcm2835_dma_remove,
> + .driver = {
> + .name = "bcm2835-dma",
> + .owner = THIS_MODULE,
> + .of_match_table = of_match_ptr(bcm2835_dma_of_match),
> + },
> +};
> +
> +module_platform_driver(bcm2835_dma_driver);
> +
> +MODULE_ALIAS("platform:bcm2835-dma");
> +MODULE_DESCRIPTION("BCM2835 DMA engine driver");
> +MODULE_AUTHOR("Florian Meier <florian.meier@koalo.de>");
> +MODULE_LICENSE("GPL v2");

--
Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Intel Finland Oy

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== 2 of 2 ==
Date: Tues, Jan 7 2014 7:40 am
From: Arnd Bergmann


On Monday 06 January 2014, Florian Meier wrote:
> Add support for DMA controller of BCM2835 as used in the Raspberry Pi.
> Currently it only supports cyclic DMA.
>
> Signed-off-by: Florian Meier <florian.meier@koalo.de>

Acked-by: Arnd Bergmann <arnd@arndb.de>
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==============================================================================
TOPIC: x86: Add Intel graphics stolen memory quirk for gen2 platforms
http://groups.google.com/group/linux.kernel/t/2caefa06ab54c9c1?hl=en
==============================================================================

== 1 of 1 ==
Date: Tues, Jan 7 2014 7:30 am
From: ville.syrjala@linux.intel.com


From: Ville Syrjälä <ville.syrjala@linux.intel.com>

There isn't an explicit stolen memory base register on gen2.
Some old comment in the i915 code suggests we should get it via
max_low_pfn_mapped, but that's clearly a bad idea on my MGM.

The e820 map in said machine looks like this:
[ 0.000000] BIOS-e820: [mem 0x0000000000000000-0x000000000009f7ff] usable
[ 0.000000] BIOS-e820: [mem 0x000000000009f800-0x000000000009ffff] reserved
[ 0.000000] BIOS-e820: [mem 0x00000000000ce000-0x00000000000cffff] reserved
[ 0.000000] BIOS-e820: [mem 0x00000000000dc000-0x00000000000fffff] reserved
[ 0.000000] BIOS-e820: [mem 0x0000000000100000-0x000000001f6effff] usable
[ 0.000000] BIOS-e820: [mem 0x000000001f6f0000-0x000000001f6f7fff] ACPI data
[ 0.000000] BIOS-e820: [mem 0x000000001f6f8000-0x000000001f6fffff] ACPI NVS
[ 0.000000] BIOS-e820: [mem 0x000000001f700000-0x000000001fffffff] reserved
[ 0.000000] BIOS-e820: [mem 0x00000000fec10000-0x00000000fec1ffff] reserved
[ 0.000000] BIOS-e820: [mem 0x00000000ffb00000-0x00000000ffbfffff] reserved
[ 0.000000] BIOS-e820: [mem 0x00000000fff00000-0x00000000ffffffff] reserved

That makes max_low_pfn_mapped = 1f6f0000, so assuming our stolen memory
would start there would place it on top of some ACPI memory regions.
So not a good idea as already stated.

The 9MB region after the ACPI regions at 0x1f700000 however looks
promising given that the macine reports the stolen memory size to be
8MB. Looking at the PGTBL_CTL register, the GTT entries are at offset
0x1fee00000, and given that the GTT entries occupy 128KB, it looks like
the stolen memory could start at 0x1f700000 and the GTT entries would
occupy the last 128KB of the stolen memory.

After some more digging through chipset documentation, I've determined
the BIOS first allocates space for something called TSEG (something to
do with SMM) from the top of memory, and then it allocates the graphics
stolen memory below that. Accordind to the chipset documentation TSEG
has a fixed size of 1MB on 855. So that explains the top 1MB in the
e820 region. And it also confirms that the GTT entries are in fact at
the end of the the stolen memory region.

Derive the stolen memory base address on gen2 the same as the BIOS does
(TOM-TSEG_SIZE-stolen_size). There are a few differences between the
registers on various gen2 chipsets, so a few different codepaths are
required.

865G is again bit more special since it seems to support enough memory
to hit 4GB address space issues. This means the PCI allocations will
also affect the location of the stolen memory. Fortunately there
appears to be the TOUD register which may give us the correct answer
directly. But the chipset docs are a bit unclear, so I'm not 100%
sure that the graphics stolen memory is always the last thing the
BIOS steals. Someone would need to verify it on a real system.

I tested this on the my 830 and 855 machines, and so far everything
looks peachy.

v2: Rewrite to use the TOM-TSEG_SIZE-stolen_size and TOUD methods
v3: Fix TSEG size for 830

Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: Ingo Molnar <mingo@redhat.com>
Cc: "H. Peter Anvin" <hpa@zytor.com>
Cc: x86@kernel.org
Cc: linux-kernel@vger.kernel.org
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
arch/x86/kernel/early-quirks.c | 132 +++++++++++++++++++++++++++++++++++++++++
include/drm/i915_drm.h | 20 +++++++
2 files changed, 152 insertions(+)

diff --git a/arch/x86/kernel/early-quirks.c b/arch/x86/kernel/early-quirks.c
index fddd4d0..5218dd2 100644
--- a/arch/x86/kernel/early-quirks.c
+++ b/arch/x86/kernel/early-quirks.c
@@ -247,6 +247,114 @@ static u32 __init intel_stolen_base(int num, int slot, int func, size_t stolen_s
#define MB(x) (KB (KB (x)))
#define GB(x) (MB (KB (x)))

+static size_t __init i830_tseg_size(void)
+{
+ u8 tmp = read_pci_config_byte(0, 0, 0, I830_ESMRAMC);
+
+ if (!(tmp & TSEG_ENABLE))
+ return 0;
+
+ if (tmp & I830_TSEG_SIZE_1M)
+ return MB(1);
+ else
+ return KB(512);
+}
+
+static size_t __init i845_tseg_size(void)
+{
+ u8 tmp = read_pci_config_byte(0, 0, 0, I845_ESMRAMC);
+
+ if (!(tmp & TSEG_ENABLE))
+ return 0;
+
+ switch (tmp & I845_TSEG_SIZE_MASK) {
+ case I845_TSEG_SIZE_512K:
+ return KB(512);
+ case I845_TSEG_SIZE_1M:
+ return MB(1);
+ default:
+ WARN_ON(1);
+ return 0;
+ }
+}
+
+static size_t __init i85x_tseg_size(void)
+{
+ u8 tmp = read_pci_config_byte(0, 0, 0, I85X_ESMRAMC);
+
+ if (!(tmp & TSEG_ENABLE))
+ return 0;
+
+ return MB(1);
+}
+
+static size_t __init i830_mem_size(void)
+{
+ return read_pci_config_byte(0, 0, 0, I830_DRB3) * MB(32);
+}
+
+static size_t __init i85x_mem_size(void)
+{
+ return read_pci_config_byte(0, 0, 1, I85X_DRB3) * MB(32);
+}
+
+/*
+ * On 830/845/85x the stolen memory base isn't available in any
+ * register. We need to calculate it as TOM-TSEG_SIZE-stolen_size.
+ */
+static u32 __init i830_stolen_base(int num, int slot, int func, size_t stolen_size)
+{
+ return i830_mem_size() - i830_tseg_size() - stolen_size;
+}
+
+static u32 __init i845_stolen_base(int num, int slot, int func, size_t stolen_size)
+{
+ return i830_mem_size() - i845_tseg_size() - stolen_size;
+}
+
+static u32 __init i85x_stolen_base(int num, int slot, int func, size_t stolen_size)
+{
+ return i85x_mem_size() - i85x_tseg_size() - stolen_size;
+}
+
+static u32 __init i865_stolen_base(int num, int slot, int func, size_t stolen_size)
+{
+ /*
+ * FIXME is the graphics stolen memory region
+ * always at TOUD? Ie. is it always the last
+ * one to be allocated by the BIOS?
+ */
+ return read_pci_config_16(0, 0, 0, I865_TOUD) << 16;
+}
+
+static size_t __init i830_stolen_size(int num, int slot, int func)
+{
+ size_t stolen_size;
+ u16 gmch_ctrl;
+
+ gmch_ctrl = read_pci_config_16(0, 0, 0, I830_GMCH_CTRL);
+
+ switch (gmch_ctrl & I830_GMCH_GMS_MASK) {
+ case I830_GMCH_GMS_STOLEN_512:
+ stolen_size = KB(512);
+ break;
+ case I830_GMCH_GMS_STOLEN_1024:
+ stolen_size = MB(1);
+ break;
+ case I830_GMCH_GMS_STOLEN_8192:
+ stolen_size = MB(8);
+ break;
+ case I830_GMCH_GMS_LOCAL:
+ /* local memory isn't part of the normal address space */
+ stolen_size = 0;
+ break;
+ default:
+ return 0;
+ }
+
+ return stolen_size;
+}
+
static size_t __init gen3_stolen_size(int num, int slot, int func)
{
size_t stolen_size;
@@ -329,6 +437,26 @@ struct intel_stolen_funcs {
u32 (*base)(int num, int slot, int func, size_t size);
};

+static const struct intel_stolen_funcs i830_stolen_funcs = {
+ .base = i830_stolen_base,
+ .size = i830_stolen_size,
+};
+
+static const struct intel_stolen_funcs i845_stolen_funcs = {
+ .base = i845_stolen_base,
+ .size = i830_stolen_size,
+};
+
+static const struct intel_stolen_funcs i85x_stolen_funcs = {
+ .base = i85x_stolen_base,
+ .size = gen3_stolen_size,
+};
+
+static const struct intel_stolen_funcs i865_stolen_funcs = {
+ .base = i865_stolen_base,
+ .size = gen3_stolen_size,
+};
+
static const struct intel_stolen_funcs gen3_stolen_funcs = {
.base = intel_stolen_base,
.size = gen3_stolen_size,
@@ -345,6 +473,10 @@ static const struct intel_stolen_funcs gen8_stolen_funcs = {
};

static struct pci_device_id intel_stolen_ids[] __initdata = {
+ INTEL_I830_IDS(&i830_stolen_funcs),
+ INTEL_I845G_IDS(&i845_stolen_funcs),
+ INTEL_I85X_IDS(&i85x_stolen_funcs),
+ INTEL_I865G_IDS(&i865_stolen_funcs),
INTEL_I915G_IDS(&gen3_stolen_funcs),
INTEL_I915GM_IDS(&gen3_stolen_funcs),
INTEL_I945G_IDS(&gen3_stolen_funcs),
diff --git a/include/drm/i915_drm.h b/include/drm/i915_drm.h
index 97d5497..595f85c 100644
--- a/include/drm/i915_drm.h
+++ b/include/drm/i915_drm.h
@@ -56,6 +56,12 @@ extern bool i915_gpu_turbo_disable(void);

#define I830_GMCH_CTRL 0x52

+#define I830_GMCH_GMS_MASK 0x70
+#define I830_GMCH_GMS_LOCAL 0x10
+#define I830_GMCH_GMS_STOLEN_512 0x20
+#define I830_GMCH_GMS_STOLEN_1024 0x30
+#define I830_GMCH_GMS_STOLEN_8192 0x40
+
#define I855_GMCH_GMS_MASK 0xF0
#define I855_GMCH_GMS_STOLEN_0M 0x0
#define I855_GMCH_GMS_STOLEN_1M (0x1 << 4)
@@ -72,4 +78,18 @@ extern bool i915_gpu_turbo_disable(void);
#define INTEL_GMCH_GMS_STOLEN_224M (0xc << 4)
#define INTEL_GMCH_GMS_STOLEN_352M (0xd << 4)

+#define I830_DRB3 0x63
+#define I85X_DRB3 0x43
+#define I865_TOUD 0xc4
+
+#define I830_ESMRAMC 0x91
+#define I845_ESMRAMC 0x9e
+#define I85X_ESMRAMC 0x61
+#define TSEG_ENABLE (1 << 0)
+#define I830_TSEG_SIZE_512K (0 << 1)
+#define I830_TSEG_SIZE_1M (1 << 1)
+#define I845_TSEG_SIZE_MASK (3 << 1)
+#define I845_TSEG_SIZE_512K (2 << 1)
+#define I845_TSEG_SIZE_1M (3 << 1)
+